From patchwork Fri Nov 30 15:38:28 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Miquel Raynal X-Patchwork-Id: 10706621 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 3CC2E13BF for ; Fri, 30 Nov 2018 15:38:53 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id C59EF2E96D for ; Fri, 30 Nov 2018 15:38:52 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id B8E922E9BB; Fri, 30 Nov 2018 15:38:52 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.9 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 4C7BC2E96D for ; Fri, 30 Nov 2018 15:38:52 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726801AbeLACse (ORCPT ); Fri, 30 Nov 2018 21:48:34 -0500 Received: from mail.bootlin.com ([62.4.15.54]:58201 "EHLO mail.bootlin.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726595AbeLACsd (ORCPT ); Fri, 30 Nov 2018 21:48:33 -0500 Received: by mail.bootlin.com (Postfix, from userid 110) id A955C20D0D; Fri, 30 Nov 2018 16:38:48 +0100 (CET) Received: from localhost.localdomain (unknown [91.224.148.103]) by mail.bootlin.com (Postfix) with ESMTPSA id B44AB207B0; Fri, 30 Nov 2018 16:38:37 +0100 (CET) From: Miquel Raynal To: Gregory Clement , Jason Cooper , Andrew Lunn , Sebastian Hesselbarth , Rob Herring , Mark Rutland , Jens Axboe , Hans de Goede Cc: , , linux-ide@vger.kernel.org, linux-pm@vger.kernel.org, Thomas Petazzoni , Antoine Tenart , Maxime Chevallier , Nadav Haklai , Miquel Raynal Subject: [PATCH v2 1/6] ata: libahci_platform: comply to PHY framework Date: Fri, 30 Nov 2018 16:38:28 +0100 Message-Id: <20181130153833.11421-2-miquel.raynal@bootlin.com> X-Mailer: git-send-email 2.19.1 In-Reply-To: <20181130153833.11421-1-miquel.raynal@bootlin.com> References: <20181130153833.11421-1-miquel.raynal@bootlin.com> MIME-Version: 1.0 Sender: linux-pm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Current implementation of the libahci does not take into account the new PHY framework. Correct the situation by adding a call to phy_set_mode() before phy_power_on() and by adding calls to ahci_platform_enable/disable_phys() at suspend/resume_host() time. Suggested-by: Grzegorz Jaszczyk Signed-off-by: Miquel Raynal --- drivers/ata/ahci.h | 2 ++ drivers/ata/libahci_platform.c | 19 ++++++++++++++++++- 2 files changed, 20 insertions(+), 1 deletion(-) diff --git a/drivers/ata/ahci.h b/drivers/ata/ahci.h index ef356e70e6de..982638b37fee 100644 --- a/drivers/ata/ahci.h +++ b/drivers/ata/ahci.h @@ -254,6 +254,8 @@ enum { AHCI_HFLAG_IS_MOBILE = (1 << 25), /* mobile chipset, use SATA_MOBILE_LPM_POLICY as default lpm_policy */ + AHCI_HFLAG_MANAGE_PHYS = (1 << 26), /* let the core manage the + PHYs when relevant */ /* ap->flags bits */ diff --git a/drivers/ata/libahci_platform.c b/drivers/ata/libahci_platform.c index 4b900fc659f7..f5a64eb1fea8 100644 --- a/drivers/ata/libahci_platform.c +++ b/drivers/ata/libahci_platform.c @@ -56,6 +56,12 @@ static int ahci_platform_enable_phys(struct ahci_host_priv *hpriv) if (rc) goto disable_phys; + rc = phy_set_mode(hpriv->phys[i], PHY_MODE_SATA); + if (rc) { + phy_exit(hpriv->phys[i]); + goto disable_phys; + } + rc = phy_power_on(hpriv->phys[i]); if (rc) { phy_exit(hpriv->phys[i]); @@ -378,7 +384,8 @@ static int ahci_platform_get_regulator(struct ahci_host_priv *hpriv, u32 port, * 3) 0 - AHCI_MAX_CLKS clocks, as specified in the devs devicetree node, * or for non devicetree enabled platforms a single clock * 4) resets, if flags has AHCI_PLATFORM_GET_RESETS (optional) - * 5) phys (optional) + * 5) phys (optional), PHY handling during suspend/resume will be skipped if the + * flag AHCI_HFLAG_MANAGE_PHYS is missing. * * RETURNS: * The allocated ahci_host_priv on success, otherwise an ERR_PTR value @@ -458,6 +465,9 @@ struct ahci_host_priv *ahci_platform_get_resources(struct platform_device *pdev, } } + if (flags & AHCI_HFLAG_MANAGE_PHYS) + hpriv->flags |= AHCI_HFLAG_MANAGE_PHYS; + hpriv->nports = child_nodes = of_get_child_count(dev->of_node); /* @@ -738,6 +748,9 @@ int ahci_platform_suspend_host(struct device *dev) writel(ctl, mmio + HOST_CTL); readl(mmio + HOST_CTL); /* flush */ + if (hpriv->flags & AHCI_HFLAG_MANAGE_PHYS) + ahci_platform_disable_phys(hpriv); + return ata_host_suspend(host, PMSG_SUSPEND); } EXPORT_SYMBOL_GPL(ahci_platform_suspend_host); @@ -756,6 +769,7 @@ EXPORT_SYMBOL_GPL(ahci_platform_suspend_host); int ahci_platform_resume_host(struct device *dev) { struct ata_host *host = dev_get_drvdata(dev); + struct ahci_host_priv *hpriv = host->private_data; int rc; if (dev->power.power_state.event == PM_EVENT_SUSPEND) { @@ -766,6 +780,9 @@ int ahci_platform_resume_host(struct device *dev) ahci_init_controller(host); } + if (hpriv->flags & AHCI_HFLAG_MANAGE_PHYS) + ahci_platform_enable_phys(hpriv); + ata_host_resume(host); return 0;