From patchwork Wed Jul 31 15:35:28 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Guillaume LA ROQUE X-Patchwork-Id: 11068367 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 802F51399 for ; Wed, 31 Jul 2019 15:35:42 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 6CE5822376 for ; Wed, 31 Jul 2019 15:35:42 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 6121F223A6; Wed, 31 Jul 2019 15:35:42 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.9 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 017CD2237D for ; Wed, 31 Jul 2019 15:35:42 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728102AbfGaPfk (ORCPT ); Wed, 31 Jul 2019 11:35:40 -0400 Received: from mail-wr1-f67.google.com ([209.85.221.67]:46318 "EHLO mail-wr1-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729197AbfGaPfi (ORCPT ); Wed, 31 Jul 2019 11:35:38 -0400 Received: by mail-wr1-f67.google.com with SMTP id z1so70158925wru.13 for ; Wed, 31 Jul 2019 08:35:37 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=C6EJL/51AHNPmVJCC71cSQAo/Uql1LEExYduU9tlj54=; b=USefCljrpz1yRsoIXF2w4xg9VXh4QbDSRfoyiXoY6jTBa7FxJT/7Due8LQ+/bxUmFp WAnAouc1YOFfmGGlkNGldaFXIxCzuzfN2zJb8T2LWO6y0KSY9g+ThTrcEkjgJRrQypui TsALxmEM6dEQtySXllvS/VgeRnzL0tr4TE/tKkqBl2gomPbnpVwkSJM34y8hi4C+tq00 nUML5hcGDz/hAz/bYVpHD4tw1+z/2tRy2XSrR0p9nOkH2XwzrkSf15x7n1UTHj+JEKVf DBXXcERhZyinR8yH4dhsmdtXxIqaSW5Xl367BjgxRe//gosv9vVQECKBtdVspL1td+tS BVcg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=C6EJL/51AHNPmVJCC71cSQAo/Uql1LEExYduU9tlj54=; b=VYyMxym0YfRnqZrGFRM+ocbnd+wO3Juoi28AarsSa9RZfnVJVzggD/jJwZDarjsuAC kS/+BGNEGbPa4GLcPEwXqFbeey/Wzc8Hu9C5motUfoVtqYGOl8kcaD8NGPkcmbufCzLL 3ypWdiJjxP6jdo4HAvBoxIxdNP97nKBUzMQUl/32I9QBkQ8tJjaiaxv5bz/i3bfPkn9o EcBfL/ie3OY6F/DGQpgmx5qQNJjzo3B2hxdFIoPslGETSYyfCjldnm9oE9QGrJgoh8aX DBNfJa6Q3GqGYEhFN1dcAfge9oSC3u/yI/bGYTcCEvL+uzIid8DkfWoKDGRtzWUARAXm 55Xg== X-Gm-Message-State: APjAAAV+0kN0keCsYsXZnBA4PBcIOSQeEfjvqmqzPU3RVf0X+tCI4FhB Tab1nfAM5iui2xaLn6JAvnns+wz00GM= X-Google-Smtp-Source: APXvYqxYIBXbtzSuPK9eyz7FC0ILxtSo7AVLrSGfVDmK39RujTf/qMGWu4sryl3IMIl6xvWfe1kg/w== X-Received: by 2002:a5d:4a4e:: with SMTP id v14mr44406641wrs.200.1564587336894; Wed, 31 Jul 2019 08:35:36 -0700 (PDT) Received: from glaroque-ThinkPad-T480.baylibre.local (lmontsouris-657-1-212-31.w90-63.abo.wanadoo.fr. [90.63.244.31]) by smtp.gmail.com with ESMTPSA id i13sm62834396wrr.73.2019.07.31.08.35.35 (version=TLS1_3 cipher=AEAD-AES256-GCM-SHA384 bits=256/256); Wed, 31 Jul 2019 08:35:36 -0700 (PDT) From: Guillaume La Roque To: daniel.lezcano@linaro.org, khilman@baylibre.com Cc: linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH v2 5/6] arm64: dts: amlogic: odroid-n2: add minimal thermal zone Date: Wed, 31 Jul 2019 17:35:28 +0200 Message-Id: <20190731153529.30159-6-glaroque@baylibre.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190731153529.30159-1-glaroque@baylibre.com> References: <20190731153529.30159-1-glaroque@baylibre.com> Sender: linux-pm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add minimal thermal zone for DDR and CPU sensor Signed-off-by: Guillaume La Roque --- .../boot/dts/amlogic/meson-g12b-odroid-n2.dts | 60 +++++++++++++++++++ 1 file changed, 60 insertions(+) diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dts b/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dts index 75ff8a7e373d..a7d73c0c8447 100644 --- a/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dts +++ b/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dts @@ -10,6 +10,7 @@ #include #include #include +#include / { compatible = "hardkernel,odroid-n2", "amlogic,g12b"; @@ -20,6 +21,55 @@ ethernet0 = ðmac; }; + thermal-zones { + cpu-thermal { + polling-delay = <1000>; + polling-delay-passive = <100>; + thermal-sensors = <&cpu_temp>; + + trips { + cpu_critical: cpu-critical { + temperature = <110000>; /* millicelsius */ + hysteresis = <2000>; /* millicelsius */ + type = "critical"; + }; + }; + + cooling-maps { + map { + trip = <&cpu_critical>; + cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu100 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu101 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu102 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu103 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + }; + }; + }; + + ddr-thermal { + polling-delay = <1000>; + polling-delay-passive = <100>; + thermal-sensors = <&ddr_temp>; + + trips { + ddr_critical: ddr-critical { + temperature = <110000>; /* millicelsius */ + hysteresis = <2000>; /* millicelsius */ + type = "critical"; + }; + }; + + cooling-maps { + map { + trip = <&ddr_critical>; + cooling-device = <&mali THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + }; + }; + }; + }; + chosen { stdout-path = "serial0:115200n8"; }; @@ -288,6 +338,7 @@ operating-points-v2 = <&cpu_opp_table_0>; clocks = <&clkc CLKID_CPU_CLK>; clock-latency = <50000>; + #cooling-cells = <2>; }; &cpu1 { @@ -295,6 +346,7 @@ operating-points-v2 = <&cpu_opp_table_0>; clocks = <&clkc CLKID_CPU_CLK>; clock-latency = <50000>; + #cooling-cells = <2>; }; &cpu100 { @@ -302,6 +354,7 @@ operating-points-v2 = <&cpub_opp_table_1>; clocks = <&clkc CLKID_CPUB_CLK>; clock-latency = <50000>; + #cooling-cells = <2>; }; &cpu101 { @@ -309,6 +362,7 @@ operating-points-v2 = <&cpub_opp_table_1>; clocks = <&clkc CLKID_CPUB_CLK>; clock-latency = <50000>; + #cooling-cells = <2>; }; &cpu102 { @@ -316,6 +370,7 @@ operating-points-v2 = <&cpub_opp_table_1>; clocks = <&clkc CLKID_CPUB_CLK>; clock-latency = <50000>; + #cooling-cells = <2>; }; &cpu103 { @@ -323,6 +378,7 @@ operating-points-v2 = <&cpub_opp_table_1>; clocks = <&clkc CLKID_CPUB_CLK>; clock-latency = <50000>; + #cooling-cells = <2>; }; &ext_mdio { @@ -377,6 +433,10 @@ }; }; +&mali { + #cooling-cells = <2>; +}; + &hdmi_tx { status = "okay"; pinctrl-0 = <&hdmitx_hpd_pins>, <&hdmitx_ddc_pins>;