| Message ID | 20200504202243.5476-9-sibis@codeaurora.org (mailing list archive) |
|---|---|
| State | Not Applicable, archived |
| Headers | show |
| Series | DDR/L3 Scaling support on SDM845 and SC7180 SoCs | expand |
diff --git a/drivers/cpufreq/qcom-cpufreq-hw.c b/drivers/cpufreq/qcom-cpufreq-hw.c index 4fb489b69bc61..4b2c23dab3728 100644 --- a/drivers/cpufreq/qcom-cpufreq-hw.c +++ b/drivers/cpufreq/qcom-cpufreq-hw.c @@ -316,7 +316,9 @@ static int qcom_cpufreq_hw_cpu_init(struct cpufreq_policy *policy) dev_pm_opp_of_register_em(policy->cpus); - policy->fast_switch_possible = true; + ret = dev_pm_opp_get_path_count(cpu_dev); + if (ret <= 0) + policy->fast_switch_possible = true; return 0; error:
Disable fast switch when the icc paths required for scaling ddr/l3 are populated. Signed-off-by: Sibi Sankar <sibis@codeaurora.org> --- drivers/cpufreq/qcom-cpufreq-hw.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-)