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[109.252.193.159]) by smtp.gmail.com with ESMTPSA id r27sm1225823lfn.290.2020.11.22.16.31.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 22 Nov 2020 16:31:31 -0800 (PST) From: Dmitry Osipenko To: Thierry Reding , Jonathan Hunter , Georgi Djakov , Rob Herring , Michael Turquette , Stephen Boyd , Peter De Schrijver , MyungJoo Ham , Kyungmin Park , Chanwoo Choi , Mikko Perttunen , Viresh Kumar , Peter Geis , Nicolas Chauvet , Krzysztof Kozlowski Cc: linux-tegra@vger.kernel.org, linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org Subject: [PATCH v10 16/19] ARM: tegra: Add nvidia,memory-controller phandle to Tegra20 EMC device-tree Date: Mon, 23 Nov 2020 03:27:20 +0300 Message-Id: <20201123002723.28463-17-digetx@gmail.com> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20201123002723.28463-1-digetx@gmail.com> References: <20201123002723.28463-1-digetx@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org Add nvidia,memory-controller to the Tegra20 External Memory Controller node. This allows to perform a direct lookup of the Memory Controller instead of walking up the whole tree. This puts Tegra20 device-tree on par with Tegra30+. Signed-off-by: Dmitry Osipenko --- arch/arm/boot/dts/tegra20.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm/boot/dts/tegra20.dtsi b/arch/arm/boot/dts/tegra20.dtsi index 2e1304493f7d..8f8ad81916e7 100644 --- a/arch/arm/boot/dts/tegra20.dtsi +++ b/arch/arm/boot/dts/tegra20.dtsi @@ -663,6 +663,8 @@ emc: memory-controller@7000f400 { #address-cells = <1>; #size-cells = <0>; #interconnect-cells = <0>; + + nvidia,memory-controller = <&mc>; }; fuse@7000f800 {