diff mbox series

[v10,01/19] dt-bindings: memory: tegra20: emc: Document opp-supported-hw property

Message ID 20201123002723.28463-2-digetx@gmail.com (mailing list archive)
State Not Applicable, archived
Headers show
Series Introduce memory interconnect for NVIDIA Tegra SoCs | expand

Commit Message

Dmitry Osipenko Nov. 23, 2020, 12:27 a.m. UTC
Document opp-supported-hw property, which is not strictly necessary to
have on Tegra20, but it's very convenient to have because all other SoC
core devices will use hardware versioning, and thus, it's good to maintain
the consistency.

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
---
 .../bindings/memory-controllers/nvidia,tegra20-emc.txt      | 6 ++++++
 1 file changed, 6 insertions(+)

Comments

Georgi Djakov Nov. 30, 2020, 9:48 a.m. UTC | #1
On 23.11.20 2:27, Dmitry Osipenko wrote:
> Document opp-supported-hw property, which is not strictly necessary to
> have on Tegra20, but it's very convenient to have because all other SoC
> core devices will use hardware versioning, and thus, it's good to maintain
> the consistency.

Hi Dmitry,

I believe Krzysztof is waiting for Ack on the binding before merging
this patch (and the rest), but unfortunately it was not sent to the
DT mailing list for review.

Thanks,
Georgi

> 
> Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
> ---
>   .../bindings/memory-controllers/nvidia,tegra20-emc.txt      | 6 ++++++
>   1 file changed, 6 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra20-emc.txt b/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra20-emc.txt
> index 67ac8d1297da..fe99ce1013bd 100644
> --- a/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra20-emc.txt
> +++ b/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra20-emc.txt
> @@ -16,6 +16,12 @@ Properties:
>   - #interconnect-cells : Should be 0.
>   - operating-points-v2: See ../bindings/opp/opp.txt for details.
>   
> +For each opp entry in 'operating-points-v2' table:
> +- opp-supported-hw: One bitfield indicating SoC process ID mask
> +
> +	A bitwise AND is performed against this value and if any bit
> +	matches, the OPP gets enabled.
> +
>   Optional properties:
>   - core-supply: Phandle of voltage regulator of the SoC "core" power domain.
>   
>
Krzysztof Kozlowski Nov. 30, 2020, 6:23 p.m. UTC | #2
On Mon, Nov 30, 2020 at 11:48:18AM +0200, Georgi Djakov wrote:
> On 23.11.20 2:27, Dmitry Osipenko wrote:
> > Document opp-supported-hw property, which is not strictly necessary to
> > have on Tegra20, but it's very convenient to have because all other SoC
> > core devices will use hardware versioning, and thus, it's good to maintain
> > the consistency.
> 
> Hi Dmitry,
> 
> I believe Krzysztof is waiting for Ack on the binding before merging
> this patch (and the rest), but unfortunately it was not sent to the
> DT mailing list for review.

Indeed I am still waiting for Rob's and Thierry's acks for this and the
following patches.  It has been just a week so I'll give it few more
days.

Best regards,
Krzysztof
Dmitry Osipenko Nov. 30, 2020, 8:03 p.m. UTC | #3
30.11.2020 21:23, Krzysztof Kozlowski пишет:
> On Mon, Nov 30, 2020 at 11:48:18AM +0200, Georgi Djakov wrote:
>> On 23.11.20 2:27, Dmitry Osipenko wrote:
>>> Document opp-supported-hw property, which is not strictly necessary to
>>> have on Tegra20, but it's very convenient to have because all other SoC
>>> core devices will use hardware versioning, and thus, it's good to maintain
>>> the consistency.
>>
>> Hi Dmitry,
>>
>> I believe Krzysztof is waiting for Ack on the binding before merging
>> this patch (and the rest), but unfortunately it was not sent to the
>> DT mailing list for review.

Good catch, thank you.

> Indeed I am still waiting for Rob's and Thierry's acks for this and the
> following patches.  It has been just a week so I'll give it few more
> days.

Rob doesn't review patches which aren't sent to the DT ML, which isn't
cc'ed in v10 by accident. I'll make v11.
diff mbox series

Patch

diff --git a/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra20-emc.txt b/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra20-emc.txt
index 67ac8d1297da..fe99ce1013bd 100644
--- a/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra20-emc.txt
+++ b/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra20-emc.txt
@@ -16,6 +16,12 @@  Properties:
 - #interconnect-cells : Should be 0.
 - operating-points-v2: See ../bindings/opp/opp.txt for details.
 
+For each opp entry in 'operating-points-v2' table:
+- opp-supported-hw: One bitfield indicating SoC process ID mask
+
+	A bitwise AND is performed against this value and if any bit
+	matches, the OPP gets enabled.
+
 Optional properties:
 - core-supply: Phandle of voltage regulator of the SoC "core" power domain.