| Message ID | 20210323135657.2701-2-roger.lu@mediatek.com (mailing list archive) |
|---|---|
| State | Not Applicable, archived |
| Headers | show |
| Series | soc: mediatek: SVS: introduce MTK SVS | expand |
On Tue, 23 Mar 2021 21:56:51 +0800, Roger Lu wrote: > Document the binding for enabling mtk svs on MediaTek SoC. > > Signed-off-by: Roger Lu <roger.lu@mediatek.com> > --- > .../bindings/soc/mediatek/mtk-svs.yaml | 81 +++++++++++++++++++ > 1 file changed, 81 insertions(+) > create mode 100644 Documentation/devicetree/bindings/soc/mediatek/mtk-svs.yaml > My bot found errors running 'make dt_binding_check' on your patch: yamllint warnings/errors: dtschema/dtc warnings/errors: /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/soc/mediatek/mtk-svs.yaml: properties:nvmem-cells:maxItems: False schema does not allow 2 /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/soc/mediatek/mtk-svs.yaml: ignoring, error in schema: properties: nvmem-cells: maxItems warning: no schema found in file: ./Documentation/devicetree/bindings/soc/mediatek/mtk-svs.yaml See https://patchwork.ozlabs.org/patch/1457219 This check can fail if there are any dependencies. The base for a patch series is generally the most recent rc1. If you already ran 'make dt_binding_check' and didn't see the above error(s), then make sure 'yamllint' is installed and dt-schema is up to date: pip3 install dtschema --upgrade Please check and re-submit.
On 21:56-20210323, Roger Lu wrote: > Document the binding for enabling mtk svs on MediaTek SoC. > > Signed-off-by: Roger Lu <roger.lu@mediatek.com> > --- > .../bindings/soc/mediatek/mtk-svs.yaml | 81 +++++++++++++++++++ > 1 file changed, 81 insertions(+) > create mode 100644 Documentation/devicetree/bindings/soc/mediatek/mtk-svs.yaml > > diff --git a/Documentation/devicetree/bindings/soc/mediatek/mtk-svs.yaml b/Documentation/devicetree/bindings/soc/mediatek/mtk-svs.yaml > new file mode 100644 > index 000000000000..0d8d12f927de > --- /dev/null > +++ b/Documentation/devicetree/bindings/soc/mediatek/mtk-svs.yaml > @@ -0,0 +1,81 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/soc/mediatek/mtk-svs.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Mediatek Smart Voltage Scaling (SVS) Device Tree Bindings > + > +maintainers: > + - Roger Lu <roger.lu@mediatek.com> > + - Matthias Brugger <matthias.bgg@gmail.com> > + - Kevin Hilman <khilman@kernel.org> > + - Nishanth Menon <nm@ti.com> Please drop me off the list. I would'nt know what to do with SVS :)
diff --git a/Documentation/devicetree/bindings/soc/mediatek/mtk-svs.yaml b/Documentation/devicetree/bindings/soc/mediatek/mtk-svs.yaml new file mode 100644 index 000000000000..0d8d12f927de --- /dev/null +++ b/Documentation/devicetree/bindings/soc/mediatek/mtk-svs.yaml @@ -0,0 +1,81 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/soc/mediatek/mtk-svs.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Mediatek Smart Voltage Scaling (SVS) Device Tree Bindings + +maintainers: + - Roger Lu <roger.lu@mediatek.com> + - Matthias Brugger <matthias.bgg@gmail.com> + - Kevin Hilman <khilman@kernel.org> + - Nishanth Menon <nm@ti.com> + +description: |+ + The SVS engine is a piece of hardware which has several + controllers(banks) for calculating suitable voltage to + different power domains(CPU/GPU/CCI) according to + chip process corner, temperatures and other factors. Then DVFS + driver could apply SVS bank voltage to PMIC/Buck. + +properties: + compatible: + enum: + - mediatek,mt8183-svs + + reg: + maxItems: 1 + description: Address range of the MTK SVS controller. + + clocks: + maxItems: 1 + description: Main clock for MTK SVS controller to work. + + clock-names: + const: main + + nvmem-cells: + maxItems: 2 + description: | + Phandle to the calibration data provided by a nvmem device. + items: + - description: SVS efuse for SVS controller + - description: Thermal efuse for SVS controller + + nvmem-cell-names: + items: + - const: svs-calibration-data + - const: t-calibration-data + +required: + - compatible + - reg + - interrupts + - clocks + - clock-names + - nvmem-cells + - nvmem-cell-names + +additionalProperties: false + +examples: + - | + #include <dt-bindings/clock/mt8183-clk.h> + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/interrupt-controller/irq.h> + + soc { + #address-cells = <2>; + #size-cells = <2>; + + svs@1100b000 { + compatible = "mediatek,mt8183-svs"; + reg = <0 0x1100b000 0 0x1000>; + interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_LOW>; + clocks = <&infracfg CLK_INFRA_THERM>; + clock-names = "main"; + nvmem-cells = <&svs_calibration>, <&thermal_calibration>; + nvmem-cell-names = "svs-calibration-data", "t-calibration-data"; + }; + };
Document the binding for enabling mtk svs on MediaTek SoC. Signed-off-by: Roger Lu <roger.lu@mediatek.com> --- .../bindings/soc/mediatek/mtk-svs.yaml | 81 +++++++++++++++++++ 1 file changed, 81 insertions(+) create mode 100644 Documentation/devicetree/bindings/soc/mediatek/mtk-svs.yaml