| Message ID | 20210812085846.2628-20-dawei.chien@mediatek.com (mailing list archive) |
|---|---|
| State | Not Applicable, archived |
| Headers | show |
| Series | Add driver for dvfsrc, support for interconnect | expand |
diff --git a/arch/arm64/boot/dts/mediatek/mt8195.dtsi b/arch/arm64/boot/dts/mediatek/mt8195.dtsi index 19430f324ee1..b010aed83906 100644 --- a/arch/arm64/boot/dts/mediatek/mt8195.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8195.dtsi @@ -6,6 +6,7 @@ /dts-v1/; #include <dt-bindings/clock/mt8195-clk.h> +#include <dt-bindings/interconnect/mtk,mt8195-emi.h> #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/power/mt8195-power.h> @@ -689,6 +690,7 @@ ddr_emi: dvfsrc@10012000 { compatible = "mediatek,mt8195-dvfsrc"; reg = <0 0x10012000 0 0x1000>; + #interconnect-cells = <1>; }; systimer: timer@10017000 {
Add DDR EMI provider dictating dram interconnect bus performance found on MT8195-based platforms Signed-off-by: Dawei Chien <dawei.chien@mediatek.com> --- arch/arm64/boot/dts/mediatek/mt8195.dtsi | 2 ++ 1 file changed, 2 insertions(+)