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Wysocki" , Daniel Lezcano , Amit Kucheria , Zhang Rui , Wim Van Sebroeck , Guenter Roeck , Sascha Hauer , NXP Linux Team , Abel Vesa , Viorel Suman , Peng Fan , Mirela Rabulea , Liu Ying , Oliver Graute , Ming Qian , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, linux-input@vger.kernel.org, linux-gpio@vger.kernel.org, linux-rtc@vger.kernel.org, linux-pm@vger.kernel.org, linux-watchdog@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: Viorel Suman , Abel Vesa Subject: [PATCH v7 02/15] dt-bindings: pinctrl: imx: Add fsl,scu-iomux yaml file Date: Mon, 4 Jul 2022 19:15:28 +0300 Message-Id: <20220704161541.943696-3-viorel.suman@oss.nxp.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220704161541.943696-1-viorel.suman@oss.nxp.com> References: <20220704161541.943696-1-viorel.suman@oss.nxp.com> X-ClientProxiedBy: AM0PR07CA0008.eurprd07.prod.outlook.com (2603:10a6:208:ac::21) To VI1PR04MB5005.eurprd04.prod.outlook.com (2603:10a6:803:57::30) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: ef13b9a1-afc5-49dc-7495-08da5dd88b5d X-MS-TrafficTypeDiagnostic: AS8PR04MB8213:EE_ X-MS-Exchange-SharedMailbox-RoutingAgent-Processed: True X-LD-Processed: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635,ExtAddr X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?iso-8859-1?q?xEG3X9106mvQi3LvFfK4pwa?= =?iso-8859-1?q?A3kWpSDQCcxhGALaQv6tT+Mv7aJ+ojwcMD/Pg9fNCtKa2Jcz4AVP/UkuvWiv?= =?iso-8859-1?q?Kzz50QqdKco3aX9BmJVAXpPuabwEiygVD0h4S5FcyNzGUXDM7Ab1ev3hGoJY?= =?iso-8859-1?q?yAXb6kxu1qSQjLma2OTp0lWJ2/k9dEY2GcFl56ifqIHR1VCm4N7bly4LD2XT?= =?iso-8859-1?q?w8+ajmW9RBSoUO/jdquBP/7djUmaY/nCsvERqoKOmk/N9gSx971wTrxlkMjZ?= =?iso-8859-1?q?9VgHjJB1g72RmhDT+FkMDe3AMB1ZTD0eM+KsrHAbXokF0/DEQo07nwszVXSV?= =?iso-8859-1?q?+/ZrYA5yBl7pwMqmnUc1zCPDbWl3aRZQZpdl3fy6Jvml2LADt2oF5s6Ne/Sd?= =?iso-8859-1?q?FcGrc+8tRqY966h4tK9GDYJt/u8gRbN8rpf0FKnZYigr+SZVofQ1YUE+q84x?= =?iso-8859-1?q?ANStr2HJN/LkGQL/bscpW/EyU9KgkAekRosgGra7XGOlFLtpj85CFm3Qjufa?= =?iso-8859-1?q?sTxjpLxBjzrVoGDEANCT7uVyrC16GOuVzP+R7nzfMO7ljzm9Vft4s5cyNkTb?= =?iso-8859-1?q?vx5iFA1M1/n92PTFMDJJFz+sIjL0Uk3greGW3TYklQlOQe4w/+wUppV0AhGD?= =?iso-8859-1?q?ePOjGMahJxA0wSCic4WnjahByICA6J4uf0s+ThrEbMWzZ5kvNn1cwJk0K/44?= =?iso-8859-1?q?1W5chPXxC7j9ozdFW7bR9YDIQWutz/70hn7SDaDVHIMw07axdf4oiMGcTrJL?= =?iso-8859-1?q?/8kjfq5rBIRoxXr2BVCMTJ1eD7n6cXfY3hZsOVAW5HRUYmUqCdeXde+Nod1/?= =?iso-8859-1?q?8zKNRp55qTr7bZB1uor/6LLQSqD3C+Km4y2tcysRWvQUM54+XBmfeSEvaMC2?= =?iso-8859-1?q?mUlHL3HoI382aRspzMelp3mmeNlnn2MJsPjddkB8lbHKNYbd2cWvI4uzrIh8?= =?iso-8859-1?q?gEph2xi9sIsiFEY1rgmTjJ3QnnpgU6HeE5xWXC10Vx1mMrMSrpuTa85UG9I7?= =?iso-8859-1?q?3GkEpCmyaEewQAXvEPvafDkHPhLuZRDifeVvyPUaRtVtgfF9qzy5C3C3+yKD?= =?iso-8859-1?q?pkp0WtjLkN6I1+0Y34JrPAlCp5+95lPmM9jLDI66R1GDzbeayzJie0Oo2dmN?= =?iso-8859-1?q?voSCn9iZFeXxPEb9gMne6WV/FQj0Z2TkHcqQWwN4TCAneKoAsBVmaRUGPsyT?= =?iso-8859-1?q?aHtjwmAt6djn0o13yESXIqGxlFaWljtvPeyIHr86i7/PPwMjJJbpggLJtAe6?= =?iso-8859-1?q?XnvKU7VTT9ERUygqfeRRX9CHoI5dqMoBEE9SuODsTzuZfUUMmkZZK3e/CX24?= =?iso-8859-1?q?Pq3VUNYd5Jdz8W0iO84t1pq1HkF2L9AlxCMNdOmif71/NpW1UWXX+tsy3RUO?= =?iso-8859-1?q?Yykk4d6YiSsuzAWAxWIpV2HZWrV+djBqV4JAZYRcjIy/boAU4KUPWJQdXRus?= =?iso-8859-1?q?3FodeqeCQpLKBDmhIp2EtkFrFPjOsvFMsZnv/REKusAxfr/P73xLQcM8zpeR?= =?iso-8859-1?q?s3UmN63EndlXseS8+1nhT8R1pr3ifU2yyFeX+ecq9KNKCiYdF4Y0phNAUPJK?= =?iso-8859-1?q?cUqYXyVVsNxJOzY8nfQy9Rxn2Gsrc8dlz78lWwKKDz6bBNsJqGUpQk3K5jWM?= =?iso-8859-1?q?Ie49x2pcLBwpBb/TQ?= X-OriginatorOrg: oss.nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: ef13b9a1-afc5-49dc-7495-08da5dd88b5d X-MS-Exchange-CrossTenant-AuthSource: VI1PR04MB5005.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 04 Jul 2022 16:16:26.0854 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: +EhrcQE+OUHHSOivZ200WdscOx25FHzd8r1K+IiF4XesA5eIRIWx3dmAdF0REhoDnQvH6cyk30PcmMcfJzwweQ== X-MS-Exchange-Transport-CrossTenantHeadersStamped: AS8PR04MB8213 Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org From: Abel Vesa In order to replace the fsl,scu txt file from bindings/arm/freescale, we need to split it between the right subsystems. This patch documents separately the 'iomux/pinctrl' child node of the SCU main node. Signed-off-by: Abel Vesa Signed-off-by: Viorel Suman Reviewed-by: Krzysztof Kozlowski --- .../bindings/arm/freescale/fsl,scu.txt | 40 ---------- .../bindings/pinctrl/fsl,scu-pinctrl.yaml | 74 +++++++++++++++++++ 2 files changed, 74 insertions(+), 40 deletions(-) create mode 100644 Documentation/devicetree/bindings/pinctrl/fsl,scu-pinctrl.yaml diff --git a/Documentation/devicetree/bindings/arm/freescale/fsl,scu.txt b/Documentation/devicetree/bindings/arm/freescale/fsl,scu.txt index ef7f5222ac48..5ec2a031194e 100644 --- a/Documentation/devicetree/bindings/arm/freescale/fsl,scu.txt +++ b/Documentation/devicetree/bindings/arm/freescale/fsl,scu.txt @@ -79,33 +79,7 @@ Required properties: See detailed Resource ID list from: include/dt-bindings/firmware/imx/rsrc.h -Pinctrl bindings based on SCU Message Protocol ------------------------------------------------------------- - -This binding uses the i.MX common pinctrl binding[3]. - -Required properties: -- compatible: Should be one of: - "fsl,imx8qm-iomuxc", - "fsl,imx8qxp-iomuxc", - "fsl,imx8dxl-iomuxc". - -Required properties for Pinctrl sub nodes: -- fsl,pins: Each entry consists of 3 integers which represents - the mux and config setting for one pin. The first 2 - integers are specified using a - PIN_FUNC_ID macro, which can be found in - , - , - . - The last integer CONFIG is the pad setting value like - pull-up on this pin. - - Please refer to i.MX8QXP Reference Manual for detailed - CONFIG settings. - [2] Documentation/devicetree/bindings/power/power-domain.yaml -[3] Documentation/devicetree/bindings/pinctrl/fsl,imx-pinctrl.txt RTC bindings based on SCU Message Protocol ------------------------------------------------------------ @@ -184,18 +158,6 @@ firmware { &lsio_mu1 1 3 &lsio_mu1 3 3>; - iomuxc { - compatible = "fsl,imx8qxp-iomuxc"; - - pinctrl_lpuart0: lpuart0grp { - fsl,pins = < - SC_P_UART0_RX_ADMA_UART0_RX 0x06000020 - SC_P_UART0_TX_ADMA_UART0_TX 0x06000020 - >; - }; - ... - }; - ocotp: imx8qx-ocotp { compatible = "fsl,imx8qxp-scu-ocotp"; #address-cells = <1>; @@ -234,7 +196,5 @@ firmware { serial@5a060000 { ... - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_lpuart0>; power-domains = <&pd IMX_SC_R_UART_0>; }; diff --git a/Documentation/devicetree/bindings/pinctrl/fsl,scu-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/fsl,scu-pinctrl.yaml new file mode 100644 index 000000000000..45ea565ce238 --- /dev/null +++ b/Documentation/devicetree/bindings/pinctrl/fsl,scu-pinctrl.yaml @@ -0,0 +1,74 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pinctrl/fsl,scu-pinctrl.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: i.MX SCU Client Device Node - Pinctrl bindings based on SCU Message Protocol + +maintainers: + - Dong Aisheng + +description: i.MX SCU Client Device Node + Client nodes are maintained as children of the relevant IMX-SCU device node. + This binding uses the i.MX common pinctrl binding. + (Documentation/devicetree/bindings/pinctrl/fsl,imx-pinctrl.txt) + +allOf: + - $ref: pinctrl.yaml# + +properties: + compatible: + enum: + - fsl,imx8qm-iomuxc + - fsl,imx8qxp-iomuxc + - fsl,imx8dxl-iomuxc + +patternProperties: + 'grp$': + type: object + description: + Pinctrl node's client devices use subnodes for desired pin configuration. + Client device subnodes use below standard properties. + + properties: + fsl,pins: + description: + each entry consists of 3 integers and represents the pin ID, the mux value + and pad setting for the pin. The first 2 integers - pin_id and mux_val - are + specified using a PIN_FUNC_ID macro, which can be found in + . The last integer is + the pad setting value like pull-up on this pin. Please refer to the + appropriate i.MX8 Reference Manual for detailed pad CONFIG settings. + $ref: /schemas/types.yaml#/definitions/uint32-matrix + items: + items: + - description: | + "pin_id" indicates the pin ID + - description: | + "mux_val" indicates the mux value to be applied. + - description: | + "pad_setting" indicates the pad configuration value to be applied. + + required: + - fsl,pins + + additionalProperties: false + +required: + - compatible + +additionalProperties: false + +examples: + - | + pinctrl { + compatible = "fsl,imx8qxp-iomuxc"; + + pinctrl_lpuart0: lpuart0grp { + fsl,pins = < + 111 0 0x06000020 + 112 0 0x06000020 + >; + }; + };