| Message ID | 20220713175346.630-1-mario.limonciello@amd.com (mailing list archive) |
|---|---|
| State | Mainlined, archived |
| Headers | show |
| Series | ACPI: CPPC: Fix enabling CPPC on AMD systems with shared memory | expand |
On Wed, Jul 13, 2022 at 7:54 PM Mario Limonciello <mario.limonciello@amd.com> wrote: > > When commit 72f2ecb7ece7 ("ACPI: bus: Set CPPC _OSC bits for all > and when CPPC_LIB is supported") was introduced, we found collateral > damage that a number of AMD systems that supported CPPC but > didn't advertise support in _OSC stopped having a functional > amd-pstate driver. The _OSC was only enforced on Intel systems at that > time. > > This was fixed for the MSR based designs by commit 8b356e536e69f > ("ACPI: CPPC: Don't require _OSC if X86_FEATURE_CPPC is supported") > but some shared memory based designs also support CPPC but haven't > advertised support in the _OSC. Add support for those designs as well by > hardcoding the list of systems. > > Fixes: 72f2ecb7ece7 ("ACPI: bus: Set CPPC _OSC bits for all and when CPPC_LIB is supported") > Fixes: 8b356e536e69f ("ACPI: CPPC: Don't require _OSC if X86_FEATURE_CPPC is supported") > Link: https://lore.kernel.org/all/3559249.JlDtxWtqDm@natalenko.name/ > Cc: stable@vger.kernel.org # 5.18 > Reported-and-tested-by: Oleksandr Natalenko <oleksandr@natalenko.name> > Signed-off-by: Mario Limonciello <mario.limonciello@amd.com> > --- > arch/x86/kernel/acpi/cppc.c | 6 ++++++ > 1 file changed, 6 insertions(+) > > diff --git a/arch/x86/kernel/acpi/cppc.c b/arch/x86/kernel/acpi/cppc.c > index 734b96454896..8d8752b44f11 100644 > --- a/arch/x86/kernel/acpi/cppc.c > +++ b/arch/x86/kernel/acpi/cppc.c > @@ -16,6 +16,12 @@ bool cpc_supported_by_cpu(void) > switch (boot_cpu_data.x86_vendor) { > case X86_VENDOR_AMD: > case X86_VENDOR_HYGON: > + if (boot_cpu_data.x86 == 0x19 && ((boot_cpu_data.x86_model <= 0x0f) || > + (boot_cpu_data.x86_model >= 0x20 && boot_cpu_data.x86_model <= 0x2f))) > + return true; > + else if (boot_cpu_data.x86 == 0x17 && > + boot_cpu_data.x86_model >= 0x70 && boot_cpu_data.x86_model <= 0x7f) > + return true; > return boot_cpu_has(X86_FEATURE_CPPC); > } > return false; > -- Applied as 5.19-rc material, thanks!
diff --git a/arch/x86/kernel/acpi/cppc.c b/arch/x86/kernel/acpi/cppc.c index 734b96454896..8d8752b44f11 100644 --- a/arch/x86/kernel/acpi/cppc.c +++ b/arch/x86/kernel/acpi/cppc.c @@ -16,6 +16,12 @@ bool cpc_supported_by_cpu(void) switch (boot_cpu_data.x86_vendor) { case X86_VENDOR_AMD: case X86_VENDOR_HYGON: + if (boot_cpu_data.x86 == 0x19 && ((boot_cpu_data.x86_model <= 0x0f) || + (boot_cpu_data.x86_model >= 0x20 && boot_cpu_data.x86_model <= 0x2f))) + return true; + else if (boot_cpu_data.x86 == 0x17 && + boot_cpu_data.x86_model >= 0x70 && boot_cpu_data.x86_model <= 0x7f) + return true; return boot_cpu_has(X86_FEATURE_CPPC); } return false;
When commit 72f2ecb7ece7 ("ACPI: bus: Set CPPC _OSC bits for all and when CPPC_LIB is supported") was introduced, we found collateral damage that a number of AMD systems that supported CPPC but didn't advertise support in _OSC stopped having a functional amd-pstate driver. The _OSC was only enforced on Intel systems at that time. This was fixed for the MSR based designs by commit 8b356e536e69f ("ACPI: CPPC: Don't require _OSC if X86_FEATURE_CPPC is supported") but some shared memory based designs also support CPPC but haven't advertised support in the _OSC. Add support for those designs as well by hardcoding the list of systems. Fixes: 72f2ecb7ece7 ("ACPI: bus: Set CPPC _OSC bits for all and when CPPC_LIB is supported") Fixes: 8b356e536e69f ("ACPI: CPPC: Don't require _OSC if X86_FEATURE_CPPC is supported") Link: https://lore.kernel.org/all/3559249.JlDtxWtqDm@natalenko.name/ Cc: stable@vger.kernel.org # 5.18 Reported-and-tested-by: Oleksandr Natalenko <oleksandr@natalenko.name> Signed-off-by: Mario Limonciello <mario.limonciello@amd.com> --- arch/x86/kernel/acpi/cppc.c | 6 ++++++ 1 file changed, 6 insertions(+)