From patchwork Fri Jan 27 15:44:44 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Amjad Ouled-Ameur X-Patchwork-Id: 13118868 X-Patchwork-Delegate: daniel.lezcano@linaro.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2A955C61DA3 for ; Fri, 27 Jan 2023 15:46:06 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233650AbjA0PqF (ORCPT ); Fri, 27 Jan 2023 10:46:05 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41904 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231485AbjA0Ppu (ORCPT ); Fri, 27 Jan 2023 10:45:50 -0500 Received: from mail-wm1-x32e.google.com (mail-wm1-x32e.google.com [IPv6:2a00:1450:4864:20::32e]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 08E0B86248 for ; Fri, 27 Jan 2023 07:45:28 -0800 (PST) Received: by mail-wm1-x32e.google.com with SMTP id k16so3751073wms.2 for ; Fri, 27 Jan 2023 07:45:27 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20210112.gappssmtp.com; s=20210112; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=OyXshjMx9I3FnCnbGGf131qN8E+ObNVcWzakl//37lg=; b=MiCfWVmguKcPEbFYmVu79Px01l/+CDutY7lhKn/KIoOP8o8ZbuGRCoY+a2HYfE8yNk x/d9mAE/QjibCsBuOnkjC9/ZJxwiMjnyuCPezR+ZGMUGMdwwyLh+o1R0WG7wjjwKHy2V PLJLciLzmrcprfyzTsDmf38wG8GQCLSbw08FSMkJCgkCSE7jnIBcw2eb6g9afwh6pGxD 1Ud+s+M1CuupQQnhBI0cBVOsE8gFAAvVlDAoxfgj5FxV4gdhoTY44Ed99J+ZKuYjATSP LLv2KP8IsAXwwa4Embn6WWa4/U+xYo213dM8nnvZSRXhD0M1mcarRW1I5/m+Gu/9U82M OZyA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=OyXshjMx9I3FnCnbGGf131qN8E+ObNVcWzakl//37lg=; b=ufUu7cWsEX2cdY4VfX9yBma8MJwnqLkKrMY2z3d1PucBPu9L55FutujlyO+G9/0qDA 9HKEQrwU594OEWqkVFwAHWHQ6VEBxVuqQ9om2SDYggLg2h4RZ6c0cSFZ3kO74uRxpe7O 13xDL7cjPZqeIqyt0HGlQyAjOiWqzV7oNRCZKOk1Qmvu01HwXarL7Nr33qPT0BbCFo6u Q2LUNz6XBA9QI1qfI4WEBrhh2wJq5AN1oKQq0lxoEvvdeEqgPpecSTi0qAWx5xzsSJ82 kmf9q9G0AUUnw8pmN9k/+Oh4QoO/KqRlbskP/4x5/j0K51eHYsYaCTR3NHZo1gD9L8gL RbSw== X-Gm-Message-State: AO0yUKVMKpJEFaRbFIgIBknOhcnMhOsZxeXFhS0ZMZgjPOxZm84yZJ7r Q30h+ATHXoXPAKWYRmCYRF/xKg== X-Google-Smtp-Source: AK7set+fuqmFoiZ8iYEJcMGWmpm3mHuFbgkClwE4+mQm5sW3hDufkWSab2lXxB3tprWS91aTlmcM/Q== X-Received: by 2002:a05:600c:3510:b0:3dc:3da0:172f with SMTP id h16-20020a05600c351000b003dc3da0172fmr2020491wmq.13.1674834317549; Fri, 27 Jan 2023 07:45:17 -0800 (PST) Received: from [127.0.1.1] (62.213.132.195.rev.sfr.net. [195.132.213.62]) by smtp.googlemail.com with ESMTPSA id z12-20020adff74c000000b00291f1a5ced6sm4381153wrp.53.2023.01.27.07.45.16 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 27 Jan 2023 07:45:17 -0800 (PST) From: Amjad Ouled-Ameur Date: Fri, 27 Jan 2023 16:44:44 +0100 Subject: [PATCH v9 3/5] thermal: mediatek: add support for MT8365 SoC MIME-Version: 1.0 Message-Id: <20221018-up-i350-thermal-bringup-v9-3-55a1ae14af74@baylibre.com> References: <20221018-up-i350-thermal-bringup-v9-0-55a1ae14af74@baylibre.com> In-Reply-To: <20221018-up-i350-thermal-bringup-v9-0-55a1ae14af74@baylibre.com> To: "Rafael J. Wysocki" , Daniel Lezcano , Amit Kucheria , Zhang Rui , Rob Herring , Krzysztof Kozlowski Cc: linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, Fabien Parent , Matthias Brugger , AngeloGioacchino Del Regno , Rob Herring , Markus Schneider-Pargmann , Hsin-Yi Wang , Amjad Ouled-Ameur , Michael Kao X-Mailer: b4 0.11.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1674834313; l=4118; i=aouledameur@baylibre.com; s=20220920; h=from:subject:message-id; bh=5wYWtfcDejCyI0VxehU2OxyAav1D8CtnJv0pDQf46Ho=; b=h98Z9Y9mb76P05nyRDPtw0n3FMjqiP1QP+LjtEgxyhA0n5FDOut80DuP8KYSrxKDjiIT44rIHJg4 c7bpTkX3B+Sr2CqU/0GNhpQxm0EpwFp9lA5JxNyhomdoniC3P/Ih X-Developer-Key: i=aouledameur@baylibre.com; a=ed25519; pk=HgYWawSL4qLGPx+RzJ+Cuu+V8Pi/KQnDDm1wjWPMOFE= Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org From: Fabien Parent MT8365 is similar to the other SoCs supported by the driver. It has only one bank and 3 actual sensors that can be multiplexed. There is another one sensor that does not have usable data. Signed-off-by: Fabien Parent Signed-off-by: Amjad Ouled-Ameur Reviewed-by: AngeloGioacchino Del Regno --- drivers/thermal/mtk_thermal.c | 68 +++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 68 insertions(+) diff --git a/drivers/thermal/mtk_thermal.c b/drivers/thermal/mtk_thermal.c index d8ddceb75372..3a5df1440822 100644 --- a/drivers/thermal/mtk_thermal.c +++ b/drivers/thermal/mtk_thermal.c @@ -31,6 +31,7 @@ #define AUXADC_CON2_V 0x010 #define AUXADC_DATA(channel) (0x14 + (channel) * 4) +#define APMIXED_SYS_TS_CON0 0x600 #define APMIXED_SYS_TS_CON1 0x604 /* Thermal Controller Registers */ @@ -245,6 +246,17 @@ enum mtk_thermal_version { /* The calibration coefficient of sensor */ #define MT8183_CALIBRATION 153 +/* MT8365 */ +#define MT8365_TEMP_AUXADC_CHANNEL 11 +#define MT8365_CALIBRATION 164 +#define MT8365_NUM_CONTROLLER 1 +#define MT8365_NUM_BANKS 1 +#define MT8365_NUM_SENSORS 3 +#define MT8365_NUM_SENSORS_PER_ZONE 3 +#define MT8365_TS1 0 +#define MT8365_TS2 1 +#define MT8365_TS3 2 + struct mtk_thermal; struct thermal_bank_cfg { @@ -389,6 +401,24 @@ static const int mt7622_mux_values[MT7622_NUM_SENSORS] = { 0, }; static const int mt7622_vts_index[MT7622_NUM_SENSORS] = { VTS1 }; static const int mt7622_tc_offset[MT7622_NUM_CONTROLLER] = { 0x0, }; +/* MT8365 thermal sensor data */ +static const int mt8365_bank_data[MT8365_NUM_SENSORS] = { + MT8365_TS1, MT8365_TS2, MT8365_TS3 +}; + +static const int mt8365_msr[MT8365_NUM_SENSORS_PER_ZONE] = { + TEMP_MSR0, TEMP_MSR1, TEMP_MSR2 +}; + +static const int mt8365_adcpnp[MT8365_NUM_SENSORS_PER_ZONE] = { + TEMP_ADCPNP0, TEMP_ADCPNP1, TEMP_ADCPNP2 +}; + +static const int mt8365_mux_values[MT8365_NUM_SENSORS] = { 0, 1, 2 }; +static const int mt8365_tc_offset[MT8365_NUM_CONTROLLER] = { 0 }; + +static const int mt8365_vts_index[MT8365_NUM_SENSORS] = { VTS1, VTS2, VTS3 }; + /* * The MT8173 thermal controller has four banks. Each bank can read up to * four temperature sensors simultaneously. The MT8173 has a total of 5 @@ -463,6 +493,40 @@ static const struct mtk_thermal_data mt2701_thermal_data = { .version = MTK_THERMAL_V1, }; +/* + * The MT8365 thermal controller has one bank, which can read up to + * four temperature sensors simultaneously. The MT8365 has a total of 3 + * temperature sensors. + * + * The thermal core only gets the maximum temperature of this one bank, + * so the bank concept wouldn't be necessary here. However, the SVS (Smart + * Voltage Scaling) unit makes its decisions based on the same bank + * data. + */ +static const struct mtk_thermal_data mt8365_thermal_data = { + .auxadc_channel = MT8365_TEMP_AUXADC_CHANNEL, + .num_banks = MT8365_NUM_BANKS, + .num_sensors = MT8365_NUM_SENSORS, + .vts_index = mt8365_vts_index, + .cali_val = MT8365_CALIBRATION, + .num_controller = MT8365_NUM_CONTROLLER, + .controller_offset = mt8365_tc_offset, + .need_switch_bank = false, + .bank_data = { + { + .num_sensors = MT8365_NUM_SENSORS, + .sensors = mt8365_bank_data + }, + }, + .msr = mt8365_msr, + .adcpnp = mt8365_adcpnp, + .sensor_mux_values = mt8365_mux_values, + .version = MTK_THERMAL_V1, + .apmixed_buffer_ctl_reg = APMIXED_SYS_TS_CON0, + .apmixed_buffer_ctl_mask = (u32) ~GENMASK(29, 28), + .apmixed_buffer_ctl_set = 0, +}; + /* * The MT2712 thermal controller has one bank, which can read up to * four temperature sensors simultaneously. The MT2712 has a total of 4 @@ -964,6 +1028,10 @@ static const struct of_device_id mtk_thermal_of_match[] = { { .compatible = "mediatek,mt8183-thermal", .data = (void *)&mt8183_thermal_data, + }, + { + .compatible = "mediatek,mt8365-thermal", + .data = (void *)&mt8365_thermal_data, }, { }, };