From patchwork Tue Oct 25 19:15:14 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bryan Brattlof X-Patchwork-Id: 13019784 X-Patchwork-Delegate: daniel.lezcano@linaro.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id ECFC3FA3745 for ; Tue, 25 Oct 2022 19:15:37 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232656AbiJYTPg (ORCPT ); Tue, 25 Oct 2022 15:15:36 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57700 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232465AbiJYTPd (ORCPT ); Tue, 25 Oct 2022 15:15:33 -0400 Received: from fllv0015.ext.ti.com (fllv0015.ext.ti.com [198.47.19.141]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5BE967B596; Tue, 25 Oct 2022 12:15:32 -0700 (PDT) Received: from fllv0035.itg.ti.com ([10.64.41.0]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id 29PJFKN7096768; Tue, 25 Oct 2022 14:15:20 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1666725320; bh=Ppy3zj//WI1ACIOqsOM3ldBjuSRvYHp+YSUCh+3iEyY=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=Xm0OsgP1cHzp9dKZSbR2LQkM+DeEqltLgnv5HJyUms46MXWHVgrIJPzqIPJ4Xzbwr GI1xyXHO0d0ZAl5a5buLsTbH0eL/hGTPgBeuVgveEX3usyzGIC6M80VMhkgGCcHI1+ 6xG6l7Vl4vzuVFtA94eKrxpr0qo9BKAzfh5HnTZ0= Received: from DLEE103.ent.ti.com (dlee103.ent.ti.com [157.170.170.33]) by fllv0035.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 29PJFKSl058289 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Tue, 25 Oct 2022 14:15:20 -0500 Received: from DLEE111.ent.ti.com (157.170.170.22) by DLEE103.ent.ti.com (157.170.170.33) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.6; Tue, 25 Oct 2022 14:15:19 -0500 Received: from lelv0326.itg.ti.com (10.180.67.84) by DLEE111.ent.ti.com (157.170.170.22) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.6 via Frontend Transport; Tue, 25 Oct 2022 14:15:19 -0500 Received: from localhost (ileaxei01-snat.itg.ti.com [10.180.69.5]) by lelv0326.itg.ti.com (8.15.2/8.15.2) with ESMTP id 29PJFJT5007012; Tue, 25 Oct 2022 14:15:19 -0500 From: Bryan Brattlof To: "Rafael J. Wysocki" , Daniel Lezcano , Amit Kucheria , Zhang Rui , Rob Herring , Krzysztof Kozlowski , Nishanth Menon , Vignesh Raghavendra , Tero Kristo CC: Keerthy , Linux PM , Device Trees , LKML , LKML ARM , Bryan Brattlof Subject: [PATCH v2 10/11] arm64: dts: ti: k3-j721s2-mcu-wakeup: add VTM node Date: Tue, 25 Oct 2022 14:15:14 -0500 Message-ID: <20221025191515.9151-11-bb@ti.com> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221025191515.9151-1-bb@ti.com> References: <20221025191515.9151-1-bb@ti.com> MIME-Version: 1.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=4419; h=from:subject; bh=yUbz1YnFlzwwEX5NAPRC/e00ihhrXaBsJBs9hFJUH8E=; b=owNCWmg5MUFZJlNZtaJemgAAZ3///r7v6/n/7/297//mv66fv+b/9/4be+v99f7Kt9xs/V2wARsY IeoNNGgMg0AAAAAAyaAAGjQ0NAAAAAA0ANAAAD1BoDQHqaM0I8Rih0NDQGgeo0B6QAaAB6gNAAaDQA GgPUDIAGgyPUBoGnqGm1AD1PUekAAAPUANCGjaTNTEaNBpoBkAA0YjQAGgGTQAADQYmTQDTEABk0AG mmmQZAxDIAAAAAKwaQNeeYDeJ5BlT9Ehdm/g0InmwHNxal0cyCJU369XSvuCFlipcGJWOelBnggD+b TM5sUKAP4ivmOUc7BjuAptuvLGNTlHrIhzJSWs9BHvVFcFmkn8RIDKFywutHqKDqUm2DT8gybu8dd+ yWwEwXUoQmHYMqhQC1zCD9PUm1lN6a2bOa4ymiPrRor3E5edH9SyZvUAPQwfD2qygsrzISFzoI4mAI YBGOcBQ6pBpGs4jMDW93mYPnRiJkYNNThapmHrw0ZlEtI4njz0oWYiPxgKQuV0vRQCWMO1L5dVFd1R AHiMNJqjqkF/+lcwQnCCPKgteKUu89zkhyJ7uyMbFNC/H52Pcs+LyDLTrCCkIaOBzheOFKfeDSHUIC VMB7MKgxcoBMIsbAHErBN9XbpBFiEXgHLzZw/iG04GwNCkFSJQckn/F3JFOFCQtaJemg== X-Developer-Key: i=bb@ti.com; a=openpgp; fpr=D3D177E40A38DF4D1853FEEF41B90D5D71D56CE0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org The j721s2 supports a single Voltage and Thermal Management (VTM) device located in the wakeup domain with seven associated temperature monitors located in various hot spots on the die. Signed-off-by: Bryan Brattlof --- .../boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi | 8 ++ arch/arm64/boot/dts/ti/k3-j721s2-thermal.dtsi | 103 ++++++++++++++++++ arch/arm64/boot/dts/ti/k3-j721s2.dtsi | 3 + 3 files changed, 114 insertions(+) create mode 100644 arch/arm64/boot/dts/ti/k3-j721s2-thermal.dtsi diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi index 4d1bfabd1313a..8287fd32c42f3 100644 --- a/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi @@ -299,4 +299,12 @@ cpts@3d000 { ti,cpts-periodic-outputs = <2>; }; }; + + vtm0: temperature-sensor@42040000 { + compatible = "ti,j7200-vtm"; + reg = <0x0 0x42040000 0x0 0x350>, + <0x0 0x42050000 0x0 0x350>; + power-domains = <&k3_pds 154 TI_SCI_PD_SHARED>; + #thermal-sensor-cells = <1>; + }; }; diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-thermal.dtsi b/arch/arm64/boot/dts/ti/k3-j721s2-thermal.dtsi new file mode 100644 index 0000000000000..c51009536756e --- /dev/null +++ b/arch/arm64/boot/dts/ti/k3-j721s2-thermal.dtsi @@ -0,0 +1,103 @@ +// SPDX-License-Identifier: GPL-2.0 + +#include + +thermal_zones: thermal-zones { + wkup0_thermal: wkup0-thermal { + polling-delay-passive = <250>; /* milliSeconds */ + polling-delay = <500>; /* milliSeconds */ + thermal-sensors = <&vtm0 0>; + + trips { + wkup0_crit: wkup0-crit { + temperature = <125000>; /* milliCelsius */ + hysteresis = <2000>; /* milliCelsius */ + type = "critical"; + }; + }; + }; + + wkup1_thermal: wkup1-thermal { + polling-delay-passive = <250>; /* milliSeconds */ + polling-delay = <500>; /* milliSeconds */ + thermal-sensors = <&vtm0 1>; + + trips { + wkup1_crit: wkup1-crit { + temperature = <125000>; /* milliCelsius */ + hysteresis = <2000>; /* milliCelsius */ + type = "critical"; + }; + }; + }; + + main0_thermal: main0-thermal { + polling-delay-passive = <250>; /* milliSeconds */ + polling-delay = <500>; /* milliSeconds */ + thermal-sensors = <&vtm0 2>; + + trips { + main0_crit: main0-crit { + temperature = <125000>; /* milliCelsius */ + hysteresis = <2000>; /* milliCelsius */ + type = "critical"; + }; + }; + }; + + main1_thermal: main1-thermal { + polling-delay-passive = <250>; /* milliSeconds */ + polling-delay = <500>; /* milliSeconds */ + thermal-sensors = <&vtm0 3>; + + trips { + main1_crit: main1-crit { + temperature = <125000>; /* milliCelsius */ + hysteresis = <2000>; /* milliCelsius */ + type = "critical"; + }; + }; + }; + + main2_thermal: main2-thermal { + polling-delay-passive = <250>; /* milliSeconds */ + polling-delay = <500>; /* milliSeconds */ + thermal-sensors = <&vtm0 4>; + + trips { + main2_crit: main2-crit { + temperature = <125000>; /* milliCelsius */ + hysteresis = <2000>; /* milliCelsius */ + type = "critical"; + }; + }; + }; + + main3_thermal: main3-thermal { + polling-delay-passive = <250>; /* milliSeconds */ + polling-delay = <500>; /* milliSeconds */ + thermal-sensors = <&vtm0 5>; + + trips { + main3_crit: main3-crit { + temperature = <125000>; /* milliCelsius */ + hysteresis = <2000>; /* milliCelsius */ + type = "critical"; + }; + }; + }; + + main4_thermal: main4-thermal { + polling-delay-passive = <250>; /* milliSeconds */ + polling-delay = <500>; /* milliSeconds */ + thermal-sensors = <&vtm0 6>; + + trips { + main4_crit: main4-crit { + temperature = <125000>; /* milliCelsius */ + hysteresis = <2000>; /* milliCelsius */ + type = "critical"; + }; + }; + }; +}; diff --git a/arch/arm64/boot/dts/ti/k3-j721s2.dtsi b/arch/arm64/boot/dts/ti/k3-j721s2.dtsi index 7b930a85a29d6..33ea52e28b24f 100644 --- a/arch/arm64/boot/dts/ti/k3-j721s2.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j721s2.dtsi @@ -161,6 +161,9 @@ cbass_mcu_wakeup: bus@28380000 { }; }; + + #include "k3-j721s2-thermal.dtsi" + }; /* Now include peripherals from each bus segment */