| Message ID | 20230109002935.244320-7-dmitry.baryshkov@linaro.org (mailing list archive) |
|---|---|
| State | Handled Elsewhere, archived |
| Headers | show |
| Series | clk/interconnect: qcom: finish migration of IP0 to clocks | expand |
On 9.01.2023 01:29, Dmitry Baryshkov wrote: > Similar to the sdx55 and sc7180, let's drop the MASTER_IPA_CORE and > SLAVE_IPA_CORE interconnects for this platofm. platform There are no actual users > of this intercoonect. interconnect The IP0 resource will be handled by clk-rpmh > driver. > > Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> > --- Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Konrad > drivers/interconnect/core.c | 1 + > drivers/interconnect/qcom/sc8180x.c | 38 ----------------------------- > drivers/interconnect/qcom/sc8180x.h | 4 +-- > 3 files changed, 3 insertions(+), 40 deletions(-) > > diff --git a/drivers/interconnect/core.c b/drivers/interconnect/core.c > index 5b5fd436f23f..0f392f59b135 100644 > --- a/drivers/interconnect/core.c > +++ b/drivers/interconnect/core.c > @@ -1081,6 +1081,7 @@ EXPORT_SYMBOL_GPL(icc_provider_del); > > static const struct of_device_id __maybe_unused ignore_list[] = { > { .compatible = "qcom,sc7180-ipa-virt" }, > + { .compatible = "qcom,sc8180x-ipa-virt" }, > { .compatible = "qcom,sdx55-ipa-virt" }, > { .compatible = "qcom,sm8150-ipa-virt" }, > { .compatible = "qcom,sm8250-ipa-virt" }, > diff --git a/drivers/interconnect/qcom/sc8180x.c b/drivers/interconnect/qcom/sc8180x.c > index 0f515bf10bd7..c76e3a6a98cd 100644 > --- a/drivers/interconnect/qcom/sc8180x.c > +++ b/drivers/interconnect/qcom/sc8180x.c > @@ -469,15 +469,6 @@ static struct qcom_icc_node mas_qxm_ecc = { > .links = { SC8180X_SLAVE_LLCC } > }; > > -static struct qcom_icc_node mas_ipa_core_master = { > - .name = "mas_ipa_core_master", > - .id = SC8180X_MASTER_IPA_CORE, > - .channels = 1, > - .buswidth = 8, > - .num_links = 1, > - .links = { SC8180X_SLAVE_IPA_CORE } > -}; > - > static struct qcom_icc_node mas_llcc_mc = { > .name = "mas_llcc_mc", > .id = SC8180X_MASTER_LLCC, > @@ -1201,13 +1192,6 @@ static struct qcom_icc_node slv_srvc_gemnoc1 = { > .buswidth = 4 > }; > > -static struct qcom_icc_node slv_ipa_core_slave = { > - .name = "slv_ipa_core_slave", > - .id = SC8180X_SLAVE_IPA_CORE, > - .channels = 1, > - .buswidth = 8 > -}; > - > static struct qcom_icc_node slv_ebi = { > .name = "slv_ebi", > .id = SC8180X_SLAVE_EBI_CH0, > @@ -1524,11 +1508,6 @@ static struct qcom_icc_bcm bcm_co2 = { > .nodes = { &mas_qnm_npu } > }; > > -static struct qcom_icc_bcm bcm_ip0 = { > - .name = "IP0", > - .nodes = { &slv_ipa_core_slave } > -}; > - > static struct qcom_icc_bcm bcm_sn3 = { > .name = "SN3", > .keepalive = true, > @@ -1604,10 +1583,6 @@ static struct qcom_icc_bcm * const gem_noc_bcms[] = { > &bcm_sh3, > }; > > -static struct qcom_icc_bcm * const ipa_virt_bcms[] = { > - &bcm_ip0, > -}; > - > static struct qcom_icc_bcm * const mc_virt_bcms[] = { > &bcm_mc0, > &bcm_acv, > @@ -1766,11 +1741,6 @@ static struct qcom_icc_node * const gem_noc_nodes[] = { > [SLAVE_SERVICE_GEM_NOC_1] = &slv_srvc_gemnoc1, > }; > > -static struct qcom_icc_node * const ipa_virt_nodes[] = { > - [MASTER_IPA_CORE] = &mas_ipa_core_master, > - [SLAVE_IPA_CORE] = &slv_ipa_core_slave, > -}; > - > static struct qcom_icc_node * const mc_virt_nodes[] = { > [MASTER_LLCC] = &mas_llcc_mc, > [SLAVE_EBI_CH0] = &slv_ebi, > @@ -1857,13 +1827,6 @@ static const struct qcom_icc_desc sc8180x_gem_noc = { > .num_bcms = ARRAY_SIZE(gem_noc_bcms), > }; > > -static const struct qcom_icc_desc sc8180x_ipa_virt = { > - .nodes = ipa_virt_nodes, > - .num_nodes = ARRAY_SIZE(ipa_virt_nodes), > - .bcms = ipa_virt_bcms, > - .num_bcms = ARRAY_SIZE(ipa_virt_bcms), > -}; > - > static const struct qcom_icc_desc sc8180x_mc_virt = { > .nodes = mc_virt_nodes, > .num_nodes = ARRAY_SIZE(mc_virt_nodes), > @@ -1913,7 +1876,6 @@ static const struct of_device_id qnoc_of_match[] = { > { .compatible = "qcom,sc8180x-config-noc", .data = &sc8180x_config_noc }, > { .compatible = "qcom,sc8180x-dc-noc", .data = &sc8180x_dc_noc }, > { .compatible = "qcom,sc8180x-gem-noc", .data = &sc8180x_gem_noc }, > - { .compatible = "qcom,sc8180x-ipa-virt", .data = &sc8180x_ipa_virt }, > { .compatible = "qcom,sc8180x-mc-virt", .data = &sc8180x_mc_virt }, > { .compatible = "qcom,sc8180x-mmss-noc", .data = &sc8180x_mmss_noc }, > { .compatible = "qcom,sc8180x-qup-virt", .data = &sc8180x_qup_virt }, > diff --git a/drivers/interconnect/qcom/sc8180x.h b/drivers/interconnect/qcom/sc8180x.h > index 2eafd35543c7..c138dcd350f1 100644 > --- a/drivers/interconnect/qcom/sc8180x.h > +++ b/drivers/interconnect/qcom/sc8180x.h > @@ -51,7 +51,7 @@ > #define SC8180X_MASTER_SNOC_GC_MEM_NOC 41 > #define SC8180X_MASTER_SNOC_SF_MEM_NOC 42 > #define SC8180X_MASTER_ECC 43 > -#define SC8180X_MASTER_IPA_CORE 44 > +/* 44 was used by MASTER_IPA_CORE, now represented as RPMh clock */ > #define SC8180X_MASTER_LLCC 45 > #define SC8180X_MASTER_CNOC_MNOC_CFG 46 > #define SC8180X_MASTER_CAMNOC_HF0 47 > @@ -146,7 +146,7 @@ > #define SC8180X_SLAVE_LLCC 136 > #define SC8180X_SLAVE_SERVICE_GEM_NOC 137 > #define SC8180X_SLAVE_SERVICE_GEM_NOC_1 138 > -#define SC8180X_SLAVE_IPA_CORE 139 > +/* 139 was used by SLAVE_IPA_CORE, now represented as RPMh clock */ > #define SC8180X_SLAVE_EBI_CH0 140 > #define SC8180X_SLAVE_MNOC_SF_MEM_NOC 141 > #define SC8180X_SLAVE_MNOC_HF_MEM_NOC 142
diff --git a/drivers/interconnect/core.c b/drivers/interconnect/core.c index 5b5fd436f23f..0f392f59b135 100644 --- a/drivers/interconnect/core.c +++ b/drivers/interconnect/core.c @@ -1081,6 +1081,7 @@ EXPORT_SYMBOL_GPL(icc_provider_del); static const struct of_device_id __maybe_unused ignore_list[] = { { .compatible = "qcom,sc7180-ipa-virt" }, + { .compatible = "qcom,sc8180x-ipa-virt" }, { .compatible = "qcom,sdx55-ipa-virt" }, { .compatible = "qcom,sm8150-ipa-virt" }, { .compatible = "qcom,sm8250-ipa-virt" }, diff --git a/drivers/interconnect/qcom/sc8180x.c b/drivers/interconnect/qcom/sc8180x.c index 0f515bf10bd7..c76e3a6a98cd 100644 --- a/drivers/interconnect/qcom/sc8180x.c +++ b/drivers/interconnect/qcom/sc8180x.c @@ -469,15 +469,6 @@ static struct qcom_icc_node mas_qxm_ecc = { .links = { SC8180X_SLAVE_LLCC } }; -static struct qcom_icc_node mas_ipa_core_master = { - .name = "mas_ipa_core_master", - .id = SC8180X_MASTER_IPA_CORE, - .channels = 1, - .buswidth = 8, - .num_links = 1, - .links = { SC8180X_SLAVE_IPA_CORE } -}; - static struct qcom_icc_node mas_llcc_mc = { .name = "mas_llcc_mc", .id = SC8180X_MASTER_LLCC, @@ -1201,13 +1192,6 @@ static struct qcom_icc_node slv_srvc_gemnoc1 = { .buswidth = 4 }; -static struct qcom_icc_node slv_ipa_core_slave = { - .name = "slv_ipa_core_slave", - .id = SC8180X_SLAVE_IPA_CORE, - .channels = 1, - .buswidth = 8 -}; - static struct qcom_icc_node slv_ebi = { .name = "slv_ebi", .id = SC8180X_SLAVE_EBI_CH0, @@ -1524,11 +1508,6 @@ static struct qcom_icc_bcm bcm_co2 = { .nodes = { &mas_qnm_npu } }; -static struct qcom_icc_bcm bcm_ip0 = { - .name = "IP0", - .nodes = { &slv_ipa_core_slave } -}; - static struct qcom_icc_bcm bcm_sn3 = { .name = "SN3", .keepalive = true, @@ -1604,10 +1583,6 @@ static struct qcom_icc_bcm * const gem_noc_bcms[] = { &bcm_sh3, }; -static struct qcom_icc_bcm * const ipa_virt_bcms[] = { - &bcm_ip0, -}; - static struct qcom_icc_bcm * const mc_virt_bcms[] = { &bcm_mc0, &bcm_acv, @@ -1766,11 +1741,6 @@ static struct qcom_icc_node * const gem_noc_nodes[] = { [SLAVE_SERVICE_GEM_NOC_1] = &slv_srvc_gemnoc1, }; -static struct qcom_icc_node * const ipa_virt_nodes[] = { - [MASTER_IPA_CORE] = &mas_ipa_core_master, - [SLAVE_IPA_CORE] = &slv_ipa_core_slave, -}; - static struct qcom_icc_node * const mc_virt_nodes[] = { [MASTER_LLCC] = &mas_llcc_mc, [SLAVE_EBI_CH0] = &slv_ebi, @@ -1857,13 +1827,6 @@ static const struct qcom_icc_desc sc8180x_gem_noc = { .num_bcms = ARRAY_SIZE(gem_noc_bcms), }; -static const struct qcom_icc_desc sc8180x_ipa_virt = { - .nodes = ipa_virt_nodes, - .num_nodes = ARRAY_SIZE(ipa_virt_nodes), - .bcms = ipa_virt_bcms, - .num_bcms = ARRAY_SIZE(ipa_virt_bcms), -}; - static const struct qcom_icc_desc sc8180x_mc_virt = { .nodes = mc_virt_nodes, .num_nodes = ARRAY_SIZE(mc_virt_nodes), @@ -1913,7 +1876,6 @@ static const struct of_device_id qnoc_of_match[] = { { .compatible = "qcom,sc8180x-config-noc", .data = &sc8180x_config_noc }, { .compatible = "qcom,sc8180x-dc-noc", .data = &sc8180x_dc_noc }, { .compatible = "qcom,sc8180x-gem-noc", .data = &sc8180x_gem_noc }, - { .compatible = "qcom,sc8180x-ipa-virt", .data = &sc8180x_ipa_virt }, { .compatible = "qcom,sc8180x-mc-virt", .data = &sc8180x_mc_virt }, { .compatible = "qcom,sc8180x-mmss-noc", .data = &sc8180x_mmss_noc }, { .compatible = "qcom,sc8180x-qup-virt", .data = &sc8180x_qup_virt }, diff --git a/drivers/interconnect/qcom/sc8180x.h b/drivers/interconnect/qcom/sc8180x.h index 2eafd35543c7..c138dcd350f1 100644 --- a/drivers/interconnect/qcom/sc8180x.h +++ b/drivers/interconnect/qcom/sc8180x.h @@ -51,7 +51,7 @@ #define SC8180X_MASTER_SNOC_GC_MEM_NOC 41 #define SC8180X_MASTER_SNOC_SF_MEM_NOC 42 #define SC8180X_MASTER_ECC 43 -#define SC8180X_MASTER_IPA_CORE 44 +/* 44 was used by MASTER_IPA_CORE, now represented as RPMh clock */ #define SC8180X_MASTER_LLCC 45 #define SC8180X_MASTER_CNOC_MNOC_CFG 46 #define SC8180X_MASTER_CAMNOC_HF0 47 @@ -146,7 +146,7 @@ #define SC8180X_SLAVE_LLCC 136 #define SC8180X_SLAVE_SERVICE_GEM_NOC 137 #define SC8180X_SLAVE_SERVICE_GEM_NOC_1 138 -#define SC8180X_SLAVE_IPA_CORE 139 +/* 139 was used by SLAVE_IPA_CORE, now represented as RPMh clock */ #define SC8180X_SLAVE_EBI_CH0 140 #define SC8180X_SLAVE_MNOC_SF_MEM_NOC 141 #define SC8180X_SLAVE_MNOC_HF_MEM_NOC 142
Similar to the sdx55 and sc7180, let's drop the MASTER_IPA_CORE and SLAVE_IPA_CORE interconnects for this platofm. There are no actual users of this intercoonect. The IP0 resource will be handled by clk-rpmh driver. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> --- drivers/interconnect/core.c | 1 + drivers/interconnect/qcom/sc8180x.c | 38 ----------------------------- drivers/interconnect/qcom/sc8180x.h | 4 +-- 3 files changed, 3 insertions(+), 40 deletions(-)