diff mbox series

[15/18] ARM: dts: qcom: apq8064: provide voltage scaling tables

Message ID 20230612053922.3284394-16-dmitry.baryshkov@linaro.org (mailing list archive)
State New, archived
Delegated to: viresh kumar
Headers show
Series ARM: qcom: apq8064: support CPU frequency scaling | expand

Commit Message

Dmitry Baryshkov June 12, 2023, 5:39 a.m. UTC 
APQ8064 has 4 speed bins, each of them having from 4 to 6 categorization
kinds. Provide tables necessary to handle voltage scaling on this SoC.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
 arch/arm/boot/dts/qcom-apq8064.dtsi | 1017 +++++++++++++++++++++++++++
 1 file changed, 1017 insertions(+)

Comments

Christian Marangi June 11, 2023, 10:16 p.m. UTC | #1 
On Mon, Jun 12, 2023 at 04:33:09PM +0300, Dmitry Baryshkov wrote:
> On 12/06/2023 12:01, Stephan Gerhold wrote:
> > On Mon, Jun 12, 2023 at 08:39:19AM +0300, Dmitry Baryshkov wrote:
> > > APQ8064 has 4 speed bins, each of them having from 4 to 6 categorization
> > > kinds. Provide tables necessary to handle voltage scaling on this SoC.
> > > 
> > > Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> > > ---
> > >   arch/arm/boot/dts/qcom-apq8064.dtsi | 1017 +++++++++++++++++++++++++++
> > >   1 file changed, 1017 insertions(+)
> > > 
> > > diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom-apq8064.dtsi
> > > index 4ef13f3d702b..f35853b59544 100644
> > > --- a/arch/arm/boot/dts/qcom-apq8064.dtsi
> > > +++ b/arch/arm/boot/dts/qcom-apq8064.dtsi
> > > @@ -49,6 +49,9 @@ CPU0: cpu@0 {
> > >   			clocks = <&kraitcc KRAIT_CPU_0>;
> > >   			clock-names = "cpu";
> > >   			clock-latency = <100000>;
> > > +			vdd-mem-supply = <&pm8921_l24>;
> > > +			vdd-dig-supply = <&pm8921_s3>;
> > > +			vdd-core-supply = <&saw0_vreg>;
> > >   			interconnects = <&kraitcc MASTER_KRAIT_L2 &kraitcc SLAVE_KRAIT_L2>;
> > >   			operating-points-v2 = <&cpu_opp_table>;
> > >   			#cooling-cells = <2>;
> > > @@ -66,6 +69,9 @@ CPU1: cpu@1 {
> > >   			clocks = <&kraitcc KRAIT_CPU_1>;
> > >   			clock-names = "cpu";
> > >   			clock-latency = <100000>;
> > > +			vdd-mem-supply = <&pm8921_l24>;
> > > +			vdd-dig-supply = <&pm8921_s3>;
> > > +			vdd-core-supply = <&saw1_vreg>;
> > >   			interconnects = <&kraitcc MASTER_KRAIT_L2 &kraitcc SLAVE_KRAIT_L2>;
> > >   			operating-points-v2 = <&cpu_opp_table>;
> > >   			#cooling-cells = <2>;
> > > @@ -83,6 +89,9 @@ CPU2: cpu@2 {
> > >   			clocks = <&kraitcc KRAIT_CPU_2>;
> > >   			clock-names = "cpu";
> > >   			clock-latency = <100000>;
> > > +			vdd-mem-supply = <&pm8921_l24>;
> > > +			vdd-dig-supply = <&pm8921_s3>;
> > > +			vdd-core-supply = <&saw2_vreg>;
> > >   			interconnects = <&kraitcc MASTER_KRAIT_L2 &kraitcc SLAVE_KRAIT_L2>;
> > >   			operating-points-v2 = <&cpu_opp_table>;
> > >   			#cooling-cells = <2>;
> > > @@ -100,6 +109,9 @@ CPU3: cpu@3 {
> > >   			clocks = <&kraitcc KRAIT_CPU_3>;
> > >   			clock-names = "cpu";
> > >   			clock-latency = <100000>;
> > > +			vdd-mem-supply = <&pm8921_l24>;
> > > +			vdd-dig-supply = <&pm8921_s3>;
> > > +			vdd-core-supply = <&saw3_vreg>;
> > >   			interconnects = <&kraitcc MASTER_KRAIT_L2 &kraitcc SLAVE_KRAIT_L2>;
> > >   			operating-points-v2 = <&cpu_opp_table>;
> > >   			#cooling-cells = <2>;
> > > @@ -132,6 +144,81 @@ cpu_opp_table: opp-table-cpu {
> > >   		opp-384000000 {
> > >   			opp-hz = /bits/ 64 <384000000>;
> > >   			opp-peak-kBps = <384000>;
> > > +			opp-microvolt-speed0-pvs0 = <1050000 1050000 1150000>,
> > > +						    <950000 950000 1150000>,
> > > +						    <950000 950000 975000>;
> > 
> > I think this won't result in the correct switch order without making
> > some changes to the OPP core. In _set_opp() the OPP core does
> > 
> > 	/* Scaling up? Configure required OPPs before frequency */
> > 	if (!scaling_down) {
> > 		_set_required_opps();
> > 		_set_opp_bw();
> > 		opp_table->config_regulators();
> > 	}
> > 
> > 	opp_table->config_clks();
> > 
> > 	/* Scaling down? Configure required OPPs after frequency */
> > 	if (scaling_down) {
> > 		opp_table->config_regulators();
> > 		_set_opp_bw();
> > 		_set_required_opps();
> > 	}
> > 
> > Since the "bandwidth" for the L2 cache is set before the regulators
> > there is a short window where the L2 clock is running at a high
> > frequency with too low voltage, which could potentially cause
> > instability. On downstream this seems to be done in the proper order [1].
> > 
> > I'm not sure if the order in the OPP core is on purpose. If not, you
> > could propose moving the config_regulators() first (for scaling up)
> > and last (for scaling down). This would resolve the problem.
> 
> Nice catch, I missed this ordering point.
> 
> > 
> > The alternative that I've already argued for on IRC in #linux-msm a
> > couple of days ago would be to give the L2 cache (here: "interconnect")
> > an own OPP table where it can describe its voltage requirements,
> > independent from the CPU. That way the icc_set_bw() would be guaranteed
> > to apply the correct voltage before adjusting the L2 cache clock. It
> > looks like the "l2_level" voltages for vdd_dig and vdd_mem are not
> > speedbin/PVS-specific [2] so this would also significantly reduce the DT
> > size, since you wouldn't need to repeat the same vdd_dig/vdd_mem
> > voltages for all of them.
> 
> Yes. I fact our discussion triggered me to do this patchset.
> 
> So, another option would be to have something like the following snippet. Do
> you know if we are allowed to squish additional data into the L2 cache DT
> node?
>

I have a similar implementation with the l2 devfreq driver where I need
to put a compatible in the l2-cache node. From what I observed, keeping
the l2-cache node in the cpus node makes the extra compile not work
(nothing is probed) but moving the l2-cache node in the soc node and
referencing the phandle makes the compatible correctly works and that
doesn't seems to cause any problem. IMHO it would be better to have a
separate opp table for l2, should keep things more organized.

> CPU0: cpu@0 {
>     vdd-core-supply = <&saw0_vreg>;
>     interconnects = <&L2 MASTER_KRAIT_L2 &L2 SLAVE_KRAIT_L2>;
>     operating-points-v2 = <&cpu_opp_table>;
> };
> 
> L2: l2-cache {
>     compatible = "qcom,apq8064-l2-cache", "cache";
> 
>     clocks = <&kraitcc KRAIT_L2>;
>     vdd-mem-supply = <&pm8921_l24>;
>     vdd-dig-supply = <&pm8921_s3>;
>     operating-points-v2 = <&l2_opp_table>;
> 
>     l2_opp_table {
>         compatible = "operating-points-v2";
>         opp-384000000 {
>             opp-hz = /bits/ 64 <384000000>;
>             opp-microvolt = <1050000 1050000 1150000>,
>                             <950000 950000 1150000>;
>         };
> 
>         opp-648000000 {
>             opp-hz = /bits/ 64 <648000000>;
>             opp-microvolt = <1050000 1050000 1150000>,
>                             <1050000 1050000 1150000>;
>         };
> 
>         opp-1134000000 {
>             opp-hz = /bits/ 64 <1134000000>;
>             opp-microvolt = <1150000 1150000 1150000>,
>                             <1150000 1150000 1150000>;
>         };
>     };
> };
> 
> > 
> > Thanks,
> > Stephan
> > 
> > [1]: https://git.codelinaro.org/clo/la/kernel/msm/-/blob/LA.AF.1.2.1-08410-8064.0/arch/arm/mach-msm/acpuclock-krait.c#L529-588
> > [2]: https://git.codelinaro.org/clo/la/kernel/msm/-/blob/LA.AF.1.2.1-08410-8064.0/arch/arm/mach-msm/acpuclock-8064.c#L118-135
> 
> -- 
> With best wishes
> Dmitry
>
Stephan Gerhold June 12, 2023, 9:01 a.m. UTC | #2 
On Mon, Jun 12, 2023 at 08:39:19AM +0300, Dmitry Baryshkov wrote:
> APQ8064 has 4 speed bins, each of them having from 4 to 6 categorization
> kinds. Provide tables necessary to handle voltage scaling on this SoC.
> 
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> ---
>  arch/arm/boot/dts/qcom-apq8064.dtsi | 1017 +++++++++++++++++++++++++++
>  1 file changed, 1017 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom-apq8064.dtsi
> index 4ef13f3d702b..f35853b59544 100644
> --- a/arch/arm/boot/dts/qcom-apq8064.dtsi
> +++ b/arch/arm/boot/dts/qcom-apq8064.dtsi
> @@ -49,6 +49,9 @@ CPU0: cpu@0 {
>  			clocks = <&kraitcc KRAIT_CPU_0>;
>  			clock-names = "cpu";
>  			clock-latency = <100000>;
> +			vdd-mem-supply = <&pm8921_l24>;
> +			vdd-dig-supply = <&pm8921_s3>;
> +			vdd-core-supply = <&saw0_vreg>;
>  			interconnects = <&kraitcc MASTER_KRAIT_L2 &kraitcc SLAVE_KRAIT_L2>;
>  			operating-points-v2 = <&cpu_opp_table>;
>  			#cooling-cells = <2>;
> @@ -66,6 +69,9 @@ CPU1: cpu@1 {
>  			clocks = <&kraitcc KRAIT_CPU_1>;
>  			clock-names = "cpu";
>  			clock-latency = <100000>;
> +			vdd-mem-supply = <&pm8921_l24>;
> +			vdd-dig-supply = <&pm8921_s3>;
> +			vdd-core-supply = <&saw1_vreg>;
>  			interconnects = <&kraitcc MASTER_KRAIT_L2 &kraitcc SLAVE_KRAIT_L2>;
>  			operating-points-v2 = <&cpu_opp_table>;
>  			#cooling-cells = <2>;
> @@ -83,6 +89,9 @@ CPU2: cpu@2 {
>  			clocks = <&kraitcc KRAIT_CPU_2>;
>  			clock-names = "cpu";
>  			clock-latency = <100000>;
> +			vdd-mem-supply = <&pm8921_l24>;
> +			vdd-dig-supply = <&pm8921_s3>;
> +			vdd-core-supply = <&saw2_vreg>;
>  			interconnects = <&kraitcc MASTER_KRAIT_L2 &kraitcc SLAVE_KRAIT_L2>;
>  			operating-points-v2 = <&cpu_opp_table>;
>  			#cooling-cells = <2>;
> @@ -100,6 +109,9 @@ CPU3: cpu@3 {
>  			clocks = <&kraitcc KRAIT_CPU_3>;
>  			clock-names = "cpu";
>  			clock-latency = <100000>;
> +			vdd-mem-supply = <&pm8921_l24>;
> +			vdd-dig-supply = <&pm8921_s3>;
> +			vdd-core-supply = <&saw3_vreg>;
>  			interconnects = <&kraitcc MASTER_KRAIT_L2 &kraitcc SLAVE_KRAIT_L2>;
>  			operating-points-v2 = <&cpu_opp_table>;
>  			#cooling-cells = <2>;
> @@ -132,6 +144,81 @@ cpu_opp_table: opp-table-cpu {
>  		opp-384000000 {
>  			opp-hz = /bits/ 64 <384000000>;
>  			opp-peak-kBps = <384000>;
> +			opp-microvolt-speed0-pvs0 = <1050000 1050000 1150000>,
> +						    <950000 950000 1150000>,
> +						    <950000 950000 975000>;

I think this won't result in the correct switch order without making
some changes to the OPP core. In _set_opp() the OPP core does

	/* Scaling up? Configure required OPPs before frequency */
	if (!scaling_down) {
		_set_required_opps();
		_set_opp_bw();
		opp_table->config_regulators();
	}

	opp_table->config_clks();

	/* Scaling down? Configure required OPPs after frequency */
	if (scaling_down) {
		opp_table->config_regulators();
		_set_opp_bw();
		_set_required_opps();
	}

Since the "bandwidth" for the L2 cache is set before the regulators
there is a short window where the L2 clock is running at a high
frequency with too low voltage, which could potentially cause
instability. On downstream this seems to be done in the proper order [1].

I'm not sure if the order in the OPP core is on purpose. If not, you
could propose moving the config_regulators() first (for scaling up)
and last (for scaling down). This would resolve the problem.

The alternative that I've already argued for on IRC in #linux-msm a
couple of days ago would be to give the L2 cache (here: "interconnect")
an own OPP table where it can describe its voltage requirements,
independent from the CPU. That way the icc_set_bw() would be guaranteed
to apply the correct voltage before adjusting the L2 cache clock. It
looks like the "l2_level" voltages for vdd_dig and vdd_mem are not
speedbin/PVS-specific [2] so this would also significantly reduce the DT
size, since you wouldn't need to repeat the same vdd_dig/vdd_mem
voltages for all of them.

Thanks,
Stephan

[1]: https://git.codelinaro.org/clo/la/kernel/msm/-/blob/LA.AF.1.2.1-08410-8064.0/arch/arm/mach-msm/acpuclock-krait.c#L529-588
[2]: https://git.codelinaro.org/clo/la/kernel/msm/-/blob/LA.AF.1.2.1-08410-8064.0/arch/arm/mach-msm/acpuclock-8064.c#L118-135
Dmitry Baryshkov June 12, 2023, 1:33 p.m. UTC | #3 
On 12/06/2023 12:01, Stephan Gerhold wrote:
> On Mon, Jun 12, 2023 at 08:39:19AM +0300, Dmitry Baryshkov wrote:
>> APQ8064 has 4 speed bins, each of them having from 4 to 6 categorization
>> kinds. Provide tables necessary to handle voltage scaling on this SoC.
>>
>> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
>> ---
>>   arch/arm/boot/dts/qcom-apq8064.dtsi | 1017 +++++++++++++++++++++++++++
>>   1 file changed, 1017 insertions(+)
>>
>> diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom-apq8064.dtsi
>> index 4ef13f3d702b..f35853b59544 100644
>> --- a/arch/arm/boot/dts/qcom-apq8064.dtsi
>> +++ b/arch/arm/boot/dts/qcom-apq8064.dtsi
>> @@ -49,6 +49,9 @@ CPU0: cpu@0 {
>>   			clocks = <&kraitcc KRAIT_CPU_0>;
>>   			clock-names = "cpu";
>>   			clock-latency = <100000>;
>> +			vdd-mem-supply = <&pm8921_l24>;
>> +			vdd-dig-supply = <&pm8921_s3>;
>> +			vdd-core-supply = <&saw0_vreg>;
>>   			interconnects = <&kraitcc MASTER_KRAIT_L2 &kraitcc SLAVE_KRAIT_L2>;
>>   			operating-points-v2 = <&cpu_opp_table>;
>>   			#cooling-cells = <2>;
>> @@ -66,6 +69,9 @@ CPU1: cpu@1 {
>>   			clocks = <&kraitcc KRAIT_CPU_1>;
>>   			clock-names = "cpu";
>>   			clock-latency = <100000>;
>> +			vdd-mem-supply = <&pm8921_l24>;
>> +			vdd-dig-supply = <&pm8921_s3>;
>> +			vdd-core-supply = <&saw1_vreg>;
>>   			interconnects = <&kraitcc MASTER_KRAIT_L2 &kraitcc SLAVE_KRAIT_L2>;
>>   			operating-points-v2 = <&cpu_opp_table>;
>>   			#cooling-cells = <2>;
>> @@ -83,6 +89,9 @@ CPU2: cpu@2 {
>>   			clocks = <&kraitcc KRAIT_CPU_2>;
>>   			clock-names = "cpu";
>>   			clock-latency = <100000>;
>> +			vdd-mem-supply = <&pm8921_l24>;
>> +			vdd-dig-supply = <&pm8921_s3>;
>> +			vdd-core-supply = <&saw2_vreg>;
>>   			interconnects = <&kraitcc MASTER_KRAIT_L2 &kraitcc SLAVE_KRAIT_L2>;
>>   			operating-points-v2 = <&cpu_opp_table>;
>>   			#cooling-cells = <2>;
>> @@ -100,6 +109,9 @@ CPU3: cpu@3 {
>>   			clocks = <&kraitcc KRAIT_CPU_3>;
>>   			clock-names = "cpu";
>>   			clock-latency = <100000>;
>> +			vdd-mem-supply = <&pm8921_l24>;
>> +			vdd-dig-supply = <&pm8921_s3>;
>> +			vdd-core-supply = <&saw3_vreg>;
>>   			interconnects = <&kraitcc MASTER_KRAIT_L2 &kraitcc SLAVE_KRAIT_L2>;
>>   			operating-points-v2 = <&cpu_opp_table>;
>>   			#cooling-cells = <2>;
>> @@ -132,6 +144,81 @@ cpu_opp_table: opp-table-cpu {
>>   		opp-384000000 {
>>   			opp-hz = /bits/ 64 <384000000>;
>>   			opp-peak-kBps = <384000>;
>> +			opp-microvolt-speed0-pvs0 = <1050000 1050000 1150000>,
>> +						    <950000 950000 1150000>,
>> +						    <950000 950000 975000>;
> 
> I think this won't result in the correct switch order without making
> some changes to the OPP core. In _set_opp() the OPP core does
> 
> 	/* Scaling up? Configure required OPPs before frequency */
> 	if (!scaling_down) {
> 		_set_required_opps();
> 		_set_opp_bw();
> 		opp_table->config_regulators();
> 	}
> 
> 	opp_table->config_clks();
> 
> 	/* Scaling down? Configure required OPPs after frequency */
> 	if (scaling_down) {
> 		opp_table->config_regulators();
> 		_set_opp_bw();
> 		_set_required_opps();
> 	}
> 
> Since the "bandwidth" for the L2 cache is set before the regulators
> there is a short window where the L2 clock is running at a high
> frequency with too low voltage, which could potentially cause
> instability. On downstream this seems to be done in the proper order [1].
> 
> I'm not sure if the order in the OPP core is on purpose. If not, you
> could propose moving the config_regulators() first (for scaling up)
> and last (for scaling down). This would resolve the problem.

Nice catch, I missed this ordering point.

> 
> The alternative that I've already argued for on IRC in #linux-msm a
> couple of days ago would be to give the L2 cache (here: "interconnect")
> an own OPP table where it can describe its voltage requirements,
> independent from the CPU. That way the icc_set_bw() would be guaranteed
> to apply the correct voltage before adjusting the L2 cache clock. It
> looks like the "l2_level" voltages for vdd_dig and vdd_mem are not
> speedbin/PVS-specific [2] so this would also significantly reduce the DT
> size, since you wouldn't need to repeat the same vdd_dig/vdd_mem
> voltages for all of them.

Yes. I fact our discussion triggered me to do this patchset.

So, another option would be to have something like the following 
snippet. Do you know if we are allowed to squish additional data into 
the L2 cache DT node?

CPU0: cpu@0 {
     vdd-core-supply = <&saw0_vreg>;
     interconnects = <&L2 MASTER_KRAIT_L2 &L2 SLAVE_KRAIT_L2>;
     operating-points-v2 = <&cpu_opp_table>;
};

L2: l2-cache {
     compatible = "qcom,apq8064-l2-cache", "cache";

     clocks = <&kraitcc KRAIT_L2>;
     vdd-mem-supply = <&pm8921_l24>;
     vdd-dig-supply = <&pm8921_s3>;
     operating-points-v2 = <&l2_opp_table>;

     l2_opp_table {
         compatible = "operating-points-v2";
         opp-384000000 {
             opp-hz = /bits/ 64 <384000000>;
             opp-microvolt = <1050000 1050000 1150000>,
                             <950000 950000 1150000>;
         };

         opp-648000000 {
             opp-hz = /bits/ 64 <648000000>;
             opp-microvolt = <1050000 1050000 1150000>,
                             <1050000 1050000 1150000>;
         };

         opp-1134000000 {
             opp-hz = /bits/ 64 <1134000000>;
             opp-microvolt = <1150000 1150000 1150000>,
                             <1150000 1150000 1150000>;
         };
     };
};

> 
> Thanks,
> Stephan
> 
> [1]: https://git.codelinaro.org/clo/la/kernel/msm/-/blob/LA.AF.1.2.1-08410-8064.0/arch/arm/mach-msm/acpuclock-krait.c#L529-588
> [2]: https://git.codelinaro.org/clo/la/kernel/msm/-/blob/LA.AF.1.2.1-08410-8064.0/arch/arm/mach-msm/acpuclock-8064.c#L118-135
Stephan Gerhold June 12, 2023, 1:59 p.m. UTC | #4 
On Mon, Jun 12, 2023 at 04:33:09PM +0300, Dmitry Baryshkov wrote:
> On 12/06/2023 12:01, Stephan Gerhold wrote:
> > On Mon, Jun 12, 2023 at 08:39:19AM +0300, Dmitry Baryshkov wrote:
> > > APQ8064 has 4 speed bins, each of them having from 4 to 6 categorization
> > > kinds. Provide tables necessary to handle voltage scaling on this SoC.
> > > 
> > > Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> > > ---
> > >   arch/arm/boot/dts/qcom-apq8064.dtsi | 1017 +++++++++++++++++++++++++++
> > >   1 file changed, 1017 insertions(+)
> > > 
> > > diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom-apq8064.dtsi
> > > index 4ef13f3d702b..f35853b59544 100644
> > > --- a/arch/arm/boot/dts/qcom-apq8064.dtsi
> > > +++ b/arch/arm/boot/dts/qcom-apq8064.dtsi
> > > @@ -49,6 +49,9 @@ CPU0: cpu@0 {
> > >   			clocks = <&kraitcc KRAIT_CPU_0>;
> > >   			clock-names = "cpu";
> > >   			clock-latency = <100000>;
> > > +			vdd-mem-supply = <&pm8921_l24>;
> > > +			vdd-dig-supply = <&pm8921_s3>;
> > > +			vdd-core-supply = <&saw0_vreg>;
> > >   			interconnects = <&kraitcc MASTER_KRAIT_L2 &kraitcc SLAVE_KRAIT_L2>;
> > >   			operating-points-v2 = <&cpu_opp_table>;
> > >   			#cooling-cells = <2>;
> > > @@ -66,6 +69,9 @@ CPU1: cpu@1 {
> > >   			clocks = <&kraitcc KRAIT_CPU_1>;
> > >   			clock-names = "cpu";
> > >   			clock-latency = <100000>;
> > > +			vdd-mem-supply = <&pm8921_l24>;
> > > +			vdd-dig-supply = <&pm8921_s3>;
> > > +			vdd-core-supply = <&saw1_vreg>;
> > >   			interconnects = <&kraitcc MASTER_KRAIT_L2 &kraitcc SLAVE_KRAIT_L2>;
> > >   			operating-points-v2 = <&cpu_opp_table>;
> > >   			#cooling-cells = <2>;
> > > @@ -83,6 +89,9 @@ CPU2: cpu@2 {
> > >   			clocks = <&kraitcc KRAIT_CPU_2>;
> > >   			clock-names = "cpu";
> > >   			clock-latency = <100000>;
> > > +			vdd-mem-supply = <&pm8921_l24>;
> > > +			vdd-dig-supply = <&pm8921_s3>;
> > > +			vdd-core-supply = <&saw2_vreg>;
> > >   			interconnects = <&kraitcc MASTER_KRAIT_L2 &kraitcc SLAVE_KRAIT_L2>;
> > >   			operating-points-v2 = <&cpu_opp_table>;
> > >   			#cooling-cells = <2>;
> > > @@ -100,6 +109,9 @@ CPU3: cpu@3 {
> > >   			clocks = <&kraitcc KRAIT_CPU_3>;
> > >   			clock-names = "cpu";
> > >   			clock-latency = <100000>;
> > > +			vdd-mem-supply = <&pm8921_l24>;
> > > +			vdd-dig-supply = <&pm8921_s3>;
> > > +			vdd-core-supply = <&saw3_vreg>;
> > >   			interconnects = <&kraitcc MASTER_KRAIT_L2 &kraitcc SLAVE_KRAIT_L2>;
> > >   			operating-points-v2 = <&cpu_opp_table>;
> > >   			#cooling-cells = <2>;
> > > @@ -132,6 +144,81 @@ cpu_opp_table: opp-table-cpu {
> > >   		opp-384000000 {
> > >   			opp-hz = /bits/ 64 <384000000>;
> > >   			opp-peak-kBps = <384000>;
> > > +			opp-microvolt-speed0-pvs0 = <1050000 1050000 1150000>,
> > > +						    <950000 950000 1150000>,
> > > +						    <950000 950000 975000>;
> > 
> > I think this won't result in the correct switch order without making
> > some changes to the OPP core. In _set_opp() the OPP core does
> > 
> > 	/* Scaling up? Configure required OPPs before frequency */
> > 	if (!scaling_down) {
> > 		_set_required_opps();
> > 		_set_opp_bw();
> > 		opp_table->config_regulators();
> > 	}
> > 
> > 	opp_table->config_clks();
> > 
> > 	/* Scaling down? Configure required OPPs after frequency */
> > 	if (scaling_down) {
> > 		opp_table->config_regulators();
> > 		_set_opp_bw();
> > 		_set_required_opps();
> > 	}
> > 
> > Since the "bandwidth" for the L2 cache is set before the regulators
> > there is a short window where the L2 clock is running at a high
> > frequency with too low voltage, which could potentially cause
> > instability. On downstream this seems to be done in the proper order [1].
> > 
> > I'm not sure if the order in the OPP core is on purpose. If not, you
> > could propose moving the config_regulators() first (for scaling up)
> > and last (for scaling down). This would resolve the problem.
> 
> Nice catch, I missed this ordering point.
> 
> > 
> > The alternative that I've already argued for on IRC in #linux-msm a
> > couple of days ago would be to give the L2 cache (here: "interconnect")
> > an own OPP table where it can describe its voltage requirements,
> > independent from the CPU. That way the icc_set_bw() would be guaranteed
> > to apply the correct voltage before adjusting the L2 cache clock. It
> > looks like the "l2_level" voltages for vdd_dig and vdd_mem are not
> > speedbin/PVS-specific [2] so this would also significantly reduce the DT
> > size, since you wouldn't need to repeat the same vdd_dig/vdd_mem
> > voltages for all of them.
> 
> Yes. I fact our discussion triggered me to do this patchset.
> 
> So, another option would be to have something like the following snippet. Do
> you know if we are allowed to squish additional data into the L2 cache DT
> node?
> 

I suspect no one has tried this before, so only the DT maintainers could
answer this. I would say that it just follows the existing design of
clocks/-supply/OPPs on the CPU nodes. vdd-mem-supply isn't a property of
the CPU, it's a property of the L2 cache so it actually fits better there.

I think the more controversial questions might be:

  - Is a L2 cache really an "interconnect"? I suppose one could argue it
    connects multiple CPU cores to a cluster (similar how a CCI connects
    multiple clusters to a system).

  - What would bind to the l2-cache node? A separate driver? Does that
    work if it sits below the /cpus node?

Thanks,
Stephan
Dmitry Baryshkov June 12, 2023, 3:38 p.m. UTC | #5 
On 12/06/2023 16:59, Stephan Gerhold wrote:
> On Mon, Jun 12, 2023 at 04:33:09PM +0300, Dmitry Baryshkov wrote:
>> On 12/06/2023 12:01, Stephan Gerhold wrote:
>>> On Mon, Jun 12, 2023 at 08:39:19AM +0300, Dmitry Baryshkov wrote:
>>>> APQ8064 has 4 speed bins, each of them having from 4 to 6 categorization
>>>> kinds. Provide tables necessary to handle voltage scaling on this SoC.
>>>>
>>>> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
>>>> ---
>>>>    arch/arm/boot/dts/qcom-apq8064.dtsi | 1017 +++++++++++++++++++++++++++
>>>>    1 file changed, 1017 insertions(+)
>>>>
>>>> diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom-apq8064.dtsi
>>>> index 4ef13f3d702b..f35853b59544 100644
>>>> --- a/arch/arm/boot/dts/qcom-apq8064.dtsi
>>>> +++ b/arch/arm/boot/dts/qcom-apq8064.dtsi
>>>> @@ -49,6 +49,9 @@ CPU0: cpu@0 {
>>>>    			clocks = <&kraitcc KRAIT_CPU_0>;
>>>>    			clock-names = "cpu";
>>>>    			clock-latency = <100000>;
>>>> +			vdd-mem-supply = <&pm8921_l24>;
>>>> +			vdd-dig-supply = <&pm8921_s3>;
>>>> +			vdd-core-supply = <&saw0_vreg>;
>>>>    			interconnects = <&kraitcc MASTER_KRAIT_L2 &kraitcc SLAVE_KRAIT_L2>;
>>>>    			operating-points-v2 = <&cpu_opp_table>;
>>>>    			#cooling-cells = <2>;
>>>> @@ -66,6 +69,9 @@ CPU1: cpu@1 {
>>>>    			clocks = <&kraitcc KRAIT_CPU_1>;
>>>>    			clock-names = "cpu";
>>>>    			clock-latency = <100000>;
>>>> +			vdd-mem-supply = <&pm8921_l24>;
>>>> +			vdd-dig-supply = <&pm8921_s3>;
>>>> +			vdd-core-supply = <&saw1_vreg>;
>>>>    			interconnects = <&kraitcc MASTER_KRAIT_L2 &kraitcc SLAVE_KRAIT_L2>;
>>>>    			operating-points-v2 = <&cpu_opp_table>;
>>>>    			#cooling-cells = <2>;
>>>> @@ -83,6 +89,9 @@ CPU2: cpu@2 {
>>>>    			clocks = <&kraitcc KRAIT_CPU_2>;
>>>>    			clock-names = "cpu";
>>>>    			clock-latency = <100000>;
>>>> +			vdd-mem-supply = <&pm8921_l24>;
>>>> +			vdd-dig-supply = <&pm8921_s3>;
>>>> +			vdd-core-supply = <&saw2_vreg>;
>>>>    			interconnects = <&kraitcc MASTER_KRAIT_L2 &kraitcc SLAVE_KRAIT_L2>;
>>>>    			operating-points-v2 = <&cpu_opp_table>;
>>>>    			#cooling-cells = <2>;
>>>> @@ -100,6 +109,9 @@ CPU3: cpu@3 {
>>>>    			clocks = <&kraitcc KRAIT_CPU_3>;
>>>>    			clock-names = "cpu";
>>>>    			clock-latency = <100000>;
>>>> +			vdd-mem-supply = <&pm8921_l24>;
>>>> +			vdd-dig-supply = <&pm8921_s3>;
>>>> +			vdd-core-supply = <&saw3_vreg>;
>>>>    			interconnects = <&kraitcc MASTER_KRAIT_L2 &kraitcc SLAVE_KRAIT_L2>;
>>>>    			operating-points-v2 = <&cpu_opp_table>;
>>>>    			#cooling-cells = <2>;
>>>> @@ -132,6 +144,81 @@ cpu_opp_table: opp-table-cpu {
>>>>    		opp-384000000 {
>>>>    			opp-hz = /bits/ 64 <384000000>;
>>>>    			opp-peak-kBps = <384000>;
>>>> +			opp-microvolt-speed0-pvs0 = <1050000 1050000 1150000>,
>>>> +						    <950000 950000 1150000>,
>>>> +						    <950000 950000 975000>;
>>>

[skipped the OPP voltage vs bw ordering]

>>
>>>
>>> The alternative that I've already argued for on IRC in #linux-msm a
>>> couple of days ago would be to give the L2 cache (here: "interconnect")
>>> an own OPP table where it can describe its voltage requirements,
>>> independent from the CPU. That way the icc_set_bw() would be guaranteed
>>> to apply the correct voltage before adjusting the L2 cache clock. It
>>> looks like the "l2_level" voltages for vdd_dig and vdd_mem are not
>>> speedbin/PVS-specific [2] so this would also significantly reduce the DT
>>> size, since you wouldn't need to repeat the same vdd_dig/vdd_mem
>>> voltages for all of them.
>>
>> Yes. I fact our discussion triggered me to do this patchset.
>>
>> So, another option would be to have something like the following snippet. Do
>> you know if we are allowed to squish additional data into the L2 cache DT
>> node?
>>
> 
> I suspect no one has tried this before, so only the DT maintainers could
> answer this. I would say that it just follows the existing design of
> clocks/-supply/OPPs on the CPU nodes. vdd-mem-supply isn't a property of
> the CPU, it's a property of the L2 cache so it actually fits better there. >
> I think the more controversial questions might be:
> 
>    - Is a L2 cache really an "interconnect"? I suppose one could argue it
>      connects multiple CPU cores to a cluster (similar how a CCI connects
>      multiple clusters to a system).

Yes. This was my reasoning for CBF clock as well as for this L2 clock. 
The separate L2 cache device is also an interconnect from my POV. It 
connects all CPU cores and we have to vote on its frequency.

>    - What would bind to the l2-cache node? A separate driver? Does that
>      work if it sits below the /cpus node?

In the worst case we'd have to populate that manually. E.g. from the 
qcom-cpufreq-nvmem.c
diff mbox series

Patch

diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom-apq8064.dtsi
index 4ef13f3d702b..f35853b59544 100644
--- a/arch/arm/boot/dts/qcom-apq8064.dtsi
+++ b/arch/arm/boot/dts/qcom-apq8064.dtsi
@@ -49,6 +49,9 @@  CPU0: cpu@0 {
 			clocks = <&kraitcc KRAIT_CPU_0>;
 			clock-names = "cpu";
 			clock-latency = <100000>;
+			vdd-mem-supply = <&pm8921_l24>;
+			vdd-dig-supply = <&pm8921_s3>;
+			vdd-core-supply = <&saw0_vreg>;
 			interconnects = <&kraitcc MASTER_KRAIT_L2 &kraitcc SLAVE_KRAIT_L2>;
 			operating-points-v2 = <&cpu_opp_table>;
 			#cooling-cells = <2>;
@@ -66,6 +69,9 @@  CPU1: cpu@1 {
 			clocks = <&kraitcc KRAIT_CPU_1>;
 			clock-names = "cpu";
 			clock-latency = <100000>;
+			vdd-mem-supply = <&pm8921_l24>;
+			vdd-dig-supply = <&pm8921_s3>;
+			vdd-core-supply = <&saw1_vreg>;
 			interconnects = <&kraitcc MASTER_KRAIT_L2 &kraitcc SLAVE_KRAIT_L2>;
 			operating-points-v2 = <&cpu_opp_table>;
 			#cooling-cells = <2>;
@@ -83,6 +89,9 @@  CPU2: cpu@2 {
 			clocks = <&kraitcc KRAIT_CPU_2>;
 			clock-names = "cpu";
 			clock-latency = <100000>;
+			vdd-mem-supply = <&pm8921_l24>;
+			vdd-dig-supply = <&pm8921_s3>;
+			vdd-core-supply = <&saw2_vreg>;
 			interconnects = <&kraitcc MASTER_KRAIT_L2 &kraitcc SLAVE_KRAIT_L2>;
 			operating-points-v2 = <&cpu_opp_table>;
 			#cooling-cells = <2>;
@@ -100,6 +109,9 @@  CPU3: cpu@3 {
 			clocks = <&kraitcc KRAIT_CPU_3>;
 			clock-names = "cpu";
 			clock-latency = <100000>;
+			vdd-mem-supply = <&pm8921_l24>;
+			vdd-dig-supply = <&pm8921_s3>;
+			vdd-core-supply = <&saw3_vreg>;
 			interconnects = <&kraitcc MASTER_KRAIT_L2 &kraitcc SLAVE_KRAIT_L2>;
 			operating-points-v2 = <&cpu_opp_table>;
 			#cooling-cells = <2>;
@@ -132,6 +144,81 @@  cpu_opp_table: opp-table-cpu {
 		opp-384000000 {
 			opp-hz = /bits/ 64 <384000000>;
 			opp-peak-kBps = <384000>;
+			opp-microvolt-speed0-pvs0 = <1050000 1050000 1150000>,
+						    <950000 950000 1150000>,
+						    <950000 950000 975000>;
+			opp-microvolt-speed0-pvs1 = <1050000 1050000 1150000>,
+						    <950000 950000 1150000>,
+						    <925000 900000 950000>;
+			opp-microvolt-speed0-pvs3 = <1050000 1050000 1150000>,
+						    <950000 950000 1150000>,
+						    <875000 850000 900000>;
+			opp-microvolt-speed0-pvs4 = <1050000 1050000 1150000>,
+						    <950000 950000 1150000>,
+						    <875000 850000 900000>;
+			opp-microvolt-speed1-pvs0 = <1050000 1050000 1150000>,
+						    <950000 950000 1150000>,
+						    <950000 950000 975000>;
+			opp-microvolt-speed1-pvs1 = <1050000 1050000 1150000>,
+						    <950000 950000 1150000>,
+						    <975000 950000 1000000>;
+			opp-microvolt-speed1-pvs2 = <1050000 1050000 1150000>,
+						    <950000 950000 1150000>,
+						    <950000 925000 975000>;
+			opp-microvolt-speed1-pvs3 = <1050000 1050000 1150000>,
+						    <950000 950000 1150000>,
+						    <925000 900000 950000>;
+			opp-microvolt-speed1-pvs4 = <1050000 1050000 1150000>,
+						    <950000 950000 1150000>,
+						    <900000 875000 925000>;
+			opp-microvolt-speed1-pvs5 = <1050000 1050000 1150000>,
+						    <950000 950000 1150000>,
+						    <900000 875000 925000>;
+			opp-microvolt-speed1-pvs6 = <1050000 1050000 1150000>,
+						    <950000 950000 1150000>,
+						    <900000 875000 925000>;
+			opp-microvolt-speed2-pvs0 = <1050000 1050000 1150000>,
+						    <950000 950000 1150000>,
+						    <950000 950000 975000>;
+			opp-microvolt-speed2-pvs1 = <1050000 1050000 1150000>,
+						    <950000 950000 1150000>,
+						    <925000 925000 925000>;
+			opp-microvolt-speed2-pvs2 = <1050000 1050000 1150000>,
+						    <950000 950000 1150000>,
+						    <925000 900000 950000>;
+			opp-microvolt-speed2-pvs3 = <1050000 1050000 1150000>,
+						    <950000 950000 1150000>,
+						    <925000 900000 950000>;
+			opp-microvolt-speed2-pvs4 = <1050000 1050000 1150000>,
+						    <950000 950000 1150000>,
+						    <900000 875000 925000>;
+			opp-microvolt-speed2-pvs5 = <1050000 1050000 1150000>,
+						    <950000 950000 1150000>,
+						    <900000 875000 925000>;
+			opp-microvolt-speed2-pvs6 = <1050000 1050000 1150000>,
+						    <950000 950000 1150000>,
+						    <900000 875000 925000>;
+			opp-microvolt-speed14-pvs0 = <1050000 1050000 1150000>,
+						     <950000 950000 1150000>,
+						     <950000 950000 975000>;
+			opp-microvolt-speed14-pvs1 = <1050000 1050000 1150000>,
+						     <950000 950000 1150000>,
+						     <975000 950000 1000000>;
+			opp-microvolt-speed14-pvs2 = <1050000 1050000 1150000>,
+						     <950000 950000 1150000>,
+						     <950000 925000 975000>;
+			opp-microvolt-speed14-pvs3 = <1050000 1050000 1150000>,
+						     <950000 950000 1150000>,
+						     <925000 900000 950000>;
+			opp-microvolt-speed14-pvs4 = <1050000 1050000 1150000>,
+						     <950000 950000 1150000>,
+						     <900000 875000 925000>;
+			opp-microvolt-speed14-pvs5 = <1050000 1050000 1150000>,
+						     <950000 950000 1150000>,
+						     <875000 875000 875000>;
+			opp-microvolt-speed14-pvs6 = <1050000 1050000 1150000>,
+						     <950000 950000 1150000>,
+						     <900000 875000 925000>;
 			opp-supported-hw = <0x4007>;
 			/*
 			 * higher latency as it requires switching between
@@ -143,96 +230,1026 @@  opp-384000000 {
 		opp-486000000 {
 			opp-hz = /bits/ 64 <486000000>;
 			opp-peak-kBps = <648000>;
+			opp-microvolt-speed0-pvs0 = <1050000 1050000 1150000>,
+						    <1050000 1050000 1150000>,
+						    <975000 975000 1000000>;
+			opp-microvolt-speed0-pvs1 = <1050000 1050000 1150000>,
+						    <1050000 1050000 1150000>,
+						    <950000 925000 975000>;
+			opp-microvolt-speed0-pvs3 = <1050000 1050000 1150000>,
+						    <1050000 1050000 1150000>,
+						    <900000 875000 925000>;
+			opp-microvolt-speed0-pvs4 = <1050000 1050000 1150000>,
+						    <1050000 1050000 1150000>,
+						    <900000 875000 925000>;
+			opp-microvolt-speed1-pvs0 = <1050000 1050000 1150000>,
+						    <1050000 1050000 1150000>,
+						    <950000 950000 975000>;
+			opp-microvolt-speed1-pvs1 = <1050000 1050000 1150000>,
+						    <1050000 1050000 1150000>,
+						    <975000 950000 1000000>;
+			opp-microvolt-speed1-pvs2 = <1050000 1050000 1150000>,
+						    <1050000 1050000 1150000>,
+						    <950000 925000 975000>;
+			opp-microvolt-speed1-pvs3 = <1050000 1050000 1150000>,
+						    <1050000 1050000 1150000>,
+						    <925000 900000 950000>;
+			opp-microvolt-speed1-pvs4 = <1050000 1050000 1150000>,
+						    <1050000 1050000 1150000>,
+						    <900000 875000 925000>;
+			opp-microvolt-speed1-pvs5 = <1050000 1050000 1150000>,
+						    <1050000 1050000 1150000>,
+						    <900000 875000 925000>;
+			opp-microvolt-speed1-pvs6 = <1050000 1050000 1150000>,
+						    <1050000 1050000 1150000>,
+						    <900000 875000 925000>;
+			opp-microvolt-speed2-pvs0 = <1050000 1050000 1150000>,
+						    <1050000 1050000 1150000>,
+						    <950000 950000 975000>;
+			opp-microvolt-speed2-pvs1 = <1050000 1050000 1150000>,
+						    <1050000 1050000 1150000>,
+						    <925000 925000 925000>;
+			opp-microvolt-speed2-pvs2 = <1050000 1050000 1150000>,
+						    <1050000 1050000 1150000>,
+						    <925000 900000 950000>;
+			opp-microvolt-speed2-pvs3 = <1050000 1050000 1150000>,
+						    <1050000 1050000 1150000>,
+						    <925000 900000 950000>;
+			opp-microvolt-speed2-pvs4 = <1050000 1050000 1150000>,
+						    <1050000 1050000 1150000>,
+						    <900000 875000 925000>;
+			opp-microvolt-speed2-pvs5 = <1050000 1050000 1150000>,
+						    <1050000 1050000 1150000>,
+						    <900000 875000 925000>;
+			opp-microvolt-speed2-pvs6 = <1050000 1050000 1150000>,
+						    <1050000 1050000 1150000>,
+						    <900000 875000 925000>;
+			opp-microvolt-speed14-pvs0 = <1050000 1050000 1150000>,
+						     <1050000 1050000 1150000>,
+						     <950000 950000 975000>;
+			opp-microvolt-speed14-pvs1 = <1050000 1050000 1150000>,
+						     <1050000 1050000 1150000>,
+						     <975000 950000 1000000>;
+			opp-microvolt-speed14-pvs2 = <1050000 1050000 1150000>,
+						     <1050000 1050000 1150000>,
+						     <950000 925000 975000>;
+			opp-microvolt-speed14-pvs3 = <1050000 1050000 1150000>,
+						     <1050000 1050000 1150000>,
+						     <925000 900000 950000>;
+			opp-microvolt-speed14-pvs4 = <1050000 1050000 1150000>,
+						     <1050000 1050000 1150000>,
+						     <900000 875000 925000>;
+			opp-microvolt-speed14-pvs5 = <1050000 1050000 1150000>,
+						     <1050000 1050000 1150000>,
+						     <875000 875000 875000>;
+			opp-microvolt-speed14-pvs6 = <1050000 1050000 1150000>,
+						     <1050000 1050000 1150000>,
+						     <875000 875000 875000>;
 			opp-supported-hw = <0x4007>;
 		};
 
 		opp-594000000 {
 			opp-hz = /bits/ 64 <594000000>;
 			opp-peak-kBps = <648000>;
+			opp-microvolt-speed0-pvs0 = <1050000 1050000 1150000>,
+						    <1050000 1050000 1150000>,
+						    <1000000 1000000 1025000>;
+			opp-microvolt-speed0-pvs1 = <1050000 1050000 1150000>,
+						    <1050000 1050000 1150000>,
+						    <975000 950000 1000000>;
+			opp-microvolt-speed0-pvs3 = <1050000 1050000 1150000>,
+						    <1050000 1050000 1150000>,
+						    <925000 900000 950000>;
+			opp-microvolt-speed0-pvs4 = <1050000 1050000 1150000>,
+						    <1050000 1050000 1150000>,
+						    <925000 900000 950000>;
+			opp-microvolt-speed1-pvs0 = <1050000 1050000 1150000>,
+						    <1050000 1050000 1150000>,
+						    <950000 950000 975000>;
+			opp-microvolt-speed1-pvs1 = <1050000 1050000 1150000>,
+						    <1050000 1050000 1150000>,
+						    <975000 950000 1000000>;
+			opp-microvolt-speed1-pvs2 = <1050000 1050000 1150000>,
+						    <1050000 1050000 1150000>,
+						    <950000 925000 975000>;
+			opp-microvolt-speed1-pvs3 = <1050000 1050000 1150000>,
+						    <1050000 1050000 1150000>,
+						    <925000 900000 950000>;
+			opp-microvolt-speed1-pvs4 = <1050000 1050000 1150000>,
+						    <1050000 1050000 1150000>,
+						    <900000 875000 925000>;
+			opp-microvolt-speed1-pvs5 = <1050000 1050000 1150000>,
+						    <1050000 1050000 1150000>,
+						    <900000 875000 925000>;
+			opp-microvolt-speed1-pvs6 = <1050000 1050000 1150000>,
+						    <1050000 1050000 1150000>,
+						    <900000 875000 925000>;
+			opp-microvolt-speed2-pvs0 = <1050000 1050000 1150000>,
+						    <1050000 1050000 1150000>,
+						    <950000 950000 975000>;
+			opp-microvolt-speed2-pvs1 = <1050000 1050000 1150000>,
+						    <1050000 1050000 1150000>,
+						    <925000 925000 925000>;
+			opp-microvolt-speed2-pvs2 = <1050000 1050000 1150000>,
+						    <1050000 1050000 1150000>,
+						    <925000 900000 950000>;
+			opp-microvolt-speed2-pvs3 = <1050000 1050000 1150000>,
+						    <1050000 1050000 1150000>,
+						    <925000 900000 950000>;
+			opp-microvolt-speed2-pvs4 = <1050000 1050000 1150000>,
+						    <1050000 1050000 1150000>,
+						    <900000 875000 925000>;
+			opp-microvolt-speed2-pvs5 = <1050000 1050000 1150000>,
+						    <1050000 1050000 1150000>,
+						    <900000 875000 925000>;
+			opp-microvolt-speed2-pvs6 = <1050000 1050000 1150000>,
+						    <1050000 1050000 1150000>,
+						    <900000 875000 925000>;
+			opp-microvolt-speed14-pvs0 = <1050000 1050000 1150000>,
+						     <1050000 1050000 1150000>,
+						     <950000 950000 975000>;
+			opp-microvolt-speed14-pvs1 = <1050000 1050000 1150000>,
+						     <1050000 1050000 1150000>,
+						     <975000 950000 1000000>;
+			opp-microvolt-speed14-pvs2 = <1050000 1050000 1150000>,
+						     <1050000 1050000 1150000>,
+						     <950000 925000 975000>;
+			opp-microvolt-speed14-pvs3 = <1050000 1050000 1150000>,
+						     <1050000 1050000 1150000>,
+						     <925000 900000 950000>;
+			opp-microvolt-speed14-pvs4 = <1050000 1050000 1150000>,
+						     <1050000 1050000 1150000>,
+						     <900000 875000 925000>;
+			opp-microvolt-speed14-pvs5 = <1050000 1050000 1150000>,
+						     <1050000 1050000 1150000>,
+						     <875000 875000 875000>;
+			opp-microvolt-speed14-pvs6 = <1050000 1050000 1150000>,
+						     <1050000 1050000 1150000>,
+						     <900000 875000 925000>;
 			opp-supported-hw = <0x4007>;
 		};
 
 		opp-702000000 {
 			opp-hz = /bits/ 64 <702000000>;
 			opp-peak-kBps = <648000>;
+			opp-microvolt-speed0-pvs0 = <1050000 1050000 1150000>,
+						    <1050000 1050000 1150000>,
+						    <1025000 1025000 1050000>;
+			opp-microvolt-speed0-pvs1 = <1050000 1050000 1150000>,
+						    <1050000 1050000 1150000>,
+						    <1000000 975000 1025000>;
+			opp-microvolt-speed0-pvs3 = <1050000 1050000 1150000>,
+						    <1050000 1050000 1150000>,
+						    <950000 925000 975000>;
+			opp-microvolt-speed0-pvs4 = <1050000 1050000 1150000>,
+						    <1050000 1050000 1150000>,
+						    <950000 925000 975000>;
+			opp-microvolt-speed1-pvs0 = <1050000 1050000 1150000>,
+						    <1050000 1050000 1150000>,
+						    <962500 962500 987500>;
+			opp-microvolt-speed1-pvs1 = <1050000 1050000 1150000>,
+						    <1050000 1050000 1150000>,
+						    <987500 962500 1012500>;
+			opp-microvolt-speed1-pvs2 = <1050000 1050000 1150000>,
+						    <1050000 1050000 1150000>,
+						    <950000 925000 975000>;
+			opp-microvolt-speed1-pvs3 = <1050000 1050000 1150000>,
+						    <1050000 1050000 1150000>,
+						    <925000 900000 950000>;
+			opp-microvolt-speed1-pvs4 = <1050000 1050000 1150000>,
+						    <1050000 1050000 1150000>,
+						    <900000 875000 925000>;
+			opp-microvolt-speed1-pvs5 = <1050000 1050000 1150000>,
+						    <1050000 1050000 1150000>,
+						    <900000 875000 925000>;
+			opp-microvolt-speed1-pvs6 = <1050000 1050000 1150000>,
+						    <1050000 1050000 1150000>,
+						    <900000 875000 925000>;
+			opp-microvolt-speed2-pvs0 = <1050000 1050000 1150000>,
+						    <1050000 1050000 1150000>,
+						    <950000 950000 975000>;
+			opp-microvolt-speed2-pvs1 = <1050000 1050000 1150000>,
+						    <1050000 1050000 1150000>,
+						    <925000 925000 925000>;
+			opp-microvolt-speed2-pvs2 = <1050000 1050000 1150000>,
+						    <1050000 1050000 1150000>,
+						    <925000 900000 950000>;
+			opp-microvolt-speed2-pvs3 = <1050000 1050000 1150000>,
+						    <1050000 1050000 1150000>,
+						    <925000 900000 950000>;
+			opp-microvolt-speed2-pvs4 = <1050000 1050000 1150000>,
+						    <1050000 1050000 1150000>,
+						    <900000 875000 925000>;
+			opp-microvolt-speed2-pvs5 = <1050000 1050000 1150000>,
+						    <1050000 1050000 1150000>,
+						    <900000 875000 925000>;
+			opp-microvolt-speed2-pvs6 = <1050000 1050000 1150000>,
+						    <1050000 1050000 1150000>,
+						    <900000 875000 925000>;
+			opp-microvolt-speed14-pvs0 = <1050000 1050000 1150000>,
+						     <1050000 1050000 1150000>,
+						     <962500 962500 987500>;
+			opp-microvolt-speed14-pvs1 = <1050000 1050000 1150000>,
+						     <1050000 1050000 1150000>,
+						     <987500 962500 1012500>;
+			opp-microvolt-speed14-pvs2 = <1050000 1050000 1150000>,
+						     <1050000 1050000 1150000>,
+						     <950000 925000 975000>;
+			opp-microvolt-speed14-pvs3 = <1050000 1050000 1150000>,
+						     <1050000 1050000 1150000>,
+						     <925000 900000 950000>;
+			opp-microvolt-speed14-pvs4 = <1050000 1050000 1150000>,
+						     <1050000 1050000 1150000>,
+						     <900000 875000 925000>;
+			opp-microvolt-speed14-pvs5 = <1050000 1050000 1150000>,
+						     <1050000 1050000 1150000>,
+						     <875000 875000 875000>;
+			opp-microvolt-speed14-pvs6 = <1050000 1050000 1150000>,
+						     <1050000 1050000 1150000>,
+						     <900000 875000 925000>;
 			opp-supported-hw = <0x4007>;
 		};
 
 		opp-810000000 {
 			opp-hz = /bits/ 64 <810000000>;
 			opp-peak-kBps = <648000>;
+			opp-microvolt-speed0-pvs0 = <1050000 1050000 1150000>,
+						    <1050000 1050000 1150000>,
+						    <1075000 1075000 1100000>;
+			opp-microvolt-speed0-pvs1 = <1050000 1050000 1150000>,
+						    <1050000 1050000 1150000>,
+						    <1050000 1025000 1075000>;
+			opp-microvolt-speed0-pvs3 = <1050000 1050000 1150000>,
+						    <1050000 1050000 1150000>,
+						    <1000000 975000 1025000>;
+			opp-microvolt-speed0-pvs4 = <1050000 1050000 1150000>,
+						    <1050000 1050000 1150000>,
+						    <987500 962500 1012500>;
+			opp-microvolt-speed1-pvs0 = <1050000 1050000 1150000>,
+						    <1050000 1050000 1150000>,
+						    <1000000 1000000 1025000>;
+			opp-microvolt-speed1-pvs1 = <1050000 1050000 1150000>,
+						    <1050000 1050000 1150000>,
+						    <1000000 975000 1025000>;
+			opp-microvolt-speed1-pvs2 = <1050000 1050000 1150000>,
+						    <1050000 1050000 1150000>,
+						    <962500 937500 987500>;
+			opp-microvolt-speed1-pvs3 = <1050000 1050000 1150000>,
+						    <1050000 1050000 1150000>,
+						    <925000 900000 950000>;
+			opp-microvolt-speed1-pvs4 = <1050000 1050000 1150000>,
+						    <1050000 1050000 1150000>,
+						    <912500 887500 937500>;
+			opp-microvolt-speed1-pvs5 = <1050000 1050000 1150000>,
+						    <1050000 1050000 1150000>,
+						    <912500 887500 937500>;
+			opp-microvolt-speed1-pvs6 = <1050000 1050000 1150000>,
+						    <1050000 1050000 1150000>,
+						    <912500 887500 937500>;
+			opp-microvolt-speed2-pvs0 = <1050000 1050000 1150000>,
+						    <1050000 1050000 1150000>,
+						    <962500 962500 987500>;
+			opp-microvolt-speed2-pvs1 = <1050000 1050000 1150000>,
+						    <1050000 1050000 1150000>,
+						    <937500 937500 937500>;
+			opp-microvolt-speed2-pvs2 = <1050000 1050000 1150000>,
+						    <1050000 1050000 1150000>,
+						    <937500 912500 962500>;
+			opp-microvolt-speed2-pvs3 = <1050000 1050000 1150000>,
+						    <1050000 1050000 1150000>,
+						    <925000 900000 950000>;
+			opp-microvolt-speed2-pvs4 = <1050000 1050000 1150000>,
+						    <1050000 1050000 1150000>,
+						    <912500 887500 937500>;
+			opp-microvolt-speed2-pvs5 = <1050000 1050000 1150000>,
+						    <1050000 1050000 1150000>,
+						    <912500 887500 937500>;
+			opp-microvolt-speed2-pvs6 = <1050000 1050000 1150000>,
+						    <1050000 1050000 1150000>,
+						    <912500 887500 937500>;
+			opp-microvolt-speed14-pvs0 = <1050000 1050000 1150000>,
+						     <1050000 1050000 1150000>,
+						     <1000000 1000000 1025000>;
+			opp-microvolt-speed14-pvs1 = <1050000 1050000 1150000>,
+						     <1050000 1050000 1150000>,
+						     <1000000 975000 1025000>;
+			opp-microvolt-speed14-pvs2 = <1050000 1050000 1150000>,
+						     <1050000 1050000 1150000>,
+						     <962500 937500 987500>;
+			opp-microvolt-speed14-pvs3 = <1050000 1050000 1150000>,
+						     <1050000 1050000 1150000>,
+						     <925000 900000 950000>;
+			opp-microvolt-speed14-pvs4 = <1050000 1050000 1150000>,
+						     <1050000 1050000 1150000>,
+						     <912500 887500 937500>;
+			opp-microvolt-speed14-pvs5 = <1050000 1050000 1150000>,
+						     <1050000 1050000 1150000>,
+						     <887500 887500 887500>;
+			opp-microvolt-speed14-pvs6 = <1050000 1050000 1150000>,
+						     <1050000 1050000 1150000>,
+						     <912500 887500 937500>;
 			opp-supported-hw = <0x4007>;
 		};
 
 		opp-918000000 {
 			opp-hz = /bits/ 64 <918000000>;
 			opp-peak-kBps = <648000>;
+			opp-microvolt-speed0-pvs0 = <1050000 1050000 1150000>,
+						    <1050000 1050000 1150000>,
+						    <1100000 1100000 1125000>;
+			opp-microvolt-speed0-pvs1 = <1050000 1050000 1150000>,
+						    <1050000 1050000 1150000>,
+						    <1075000 1050000 1100000>;
+			opp-microvolt-speed0-pvs3 = <1050000 1050000 1150000>,
+						    <1050000 1050000 1150000>,
+						    <1025000 1000000 1050000>;
+			opp-microvolt-speed0-pvs4 = <1050000 1050000 1150000>,
+						    <1050000 1050000 1150000>,
+						    <1000000 975000 1025000>;
+			opp-microvolt-speed1-pvs0 = <1050000 1050000 1150000>,
+						    <1050000 1050000 1150000>,
+						    <1025000 1025000 1050000>;
+			opp-microvolt-speed1-pvs1 = <1050000 1050000 1150000>,
+						    <1050000 1050000 1150000>,
+						    <1025000 1000000 1050000>;
+			opp-microvolt-speed1-pvs2 = <1050000 1050000 1150000>,
+						    <1050000 1050000 1150000>,
+						    <975000 950000 1000000>;
+			opp-microvolt-speed1-pvs3 = <1050000 1050000 1150000>,
+						    <1050000 1050000 1150000>,
+						    <950000 925000 975000>;
+			opp-microvolt-speed1-pvs4 = <1050000 1050000 1150000>,
+						    <1050000 1050000 1150000>,
+						    <925000 900000 950000>;
+			opp-microvolt-speed1-pvs5 = <1050000 1050000 1150000>,
+						    <1050000 1050000 1150000>,
+						    <925000 900000 950000>;
+			opp-microvolt-speed1-pvs6 = <1050000 1050000 1150000>,
+						    <1050000 1050000 1150000>,
+						    <925000 900000 950000>;
+			opp-microvolt-speed2-pvs0 = <1050000 1050000 1150000>,
+						    <1050000 1050000 1150000>,
+						    <975000 975000 1000000>;
+			opp-microvolt-speed2-pvs1 = <1050000 1050000 1150000>,
+						    <1050000 1050000 1150000>,
+						    <950000 950000 950000>;
+			opp-microvolt-speed2-pvs2 = <1050000 1050000 1150000>,
+						    <1050000 1050000 1150000>,
+						    <950000 925000 975000>;
+			opp-microvolt-speed2-pvs3 = <1050000 1050000 1150000>,
+						    <1050000 1050000 1150000>,
+						    <937500 912500 962500>;
+			opp-microvolt-speed2-pvs4 = <1050000 1050000 1150000>,
+						    <1050000 1050000 1150000>,
+						    <925000 900000 950000>;
+			opp-microvolt-speed2-pvs5 = <1050000 1050000 1150000>,
+						    <1050000 1050000 1150000>,
+						    <925000 900000 950000>;
+			opp-microvolt-speed2-pvs6 = <1050000 1050000 1150000>,
+						    <1050000 1050000 1150000>,
+						    <925000 900000 950000>;
+			opp-microvolt-speed14-pvs0 = <1050000 1050000 1150000>,
+						     <1050000 1050000 1150000>,
+						     <1025000 1025000 1050000>;
+			opp-microvolt-speed14-pvs1 = <1050000 1050000 1150000>,
+						     <1050000 1050000 1150000>,
+						     <1025000 1000000 1050000>;
+			opp-microvolt-speed14-pvs2 = <1050000 1050000 1150000>,
+						     <1050000 1050000 1150000>,
+						     <975000 950000 1000000>;
+			opp-microvolt-speed14-pvs3 = <1050000 1050000 1150000>,
+						     <1050000 1050000 1150000>,
+						     <950000 925000 975000>;
+			opp-microvolt-speed14-pvs4 = <1050000 1050000 1150000>,
+						     <1050000 1050000 1150000>,
+						     <925000 900000 950000>;
+			opp-microvolt-speed14-pvs5 = <1050000 1050000 1150000>,
+						     <1050000 1050000 1150000>,
+						     <900000 900000 900000>;
+			opp-microvolt-speed14-pvs6 = <1050000 1050000 1150000>,
+						     <1050000 1050000 1150000>,
+						     <925000 900000 950000>;
 			opp-supported-hw = <0x4007>;
 		};
 
 		opp-1026000000 {
 			opp-hz = /bits/ 64 <1026000000>;
 			opp-peak-kBps = <648000>;
+			opp-microvolt-speed0-pvs0 = <1050000 1050000 1150000>,
+						    <1050000 1050000 1150000>,
+						    <1125000 1125000 1150000>;
+			opp-microvolt-speed0-pvs1 = <1050000 1050000 1150000>,
+						    <1050000 1050000 1150000>,
+						    <1100000 1075000 1125000>;
+			opp-microvolt-speed0-pvs3 = <1050000 1050000 1150000>,
+						    <1050000 1050000 1150000>,
+						    <1050000 1025000 1075000>;
+			opp-microvolt-speed0-pvs4 = <1050000 1050000 1150000>,
+						    <1050000 1050000 1150000>,
+						    <1025000 1000000 1050000>;
+			opp-microvolt-speed1-pvs0 = <1050000 1050000 1150000>,
+						    <1050000 1050000 1150000>,
+						    <1037500 1037500 1062500>;
+			opp-microvolt-speed1-pvs1 = <1050000 1050000 1150000>,
+						    <1050000 1050000 1150000>,
+						    <1037500 1012500 1062500>;
+			opp-microvolt-speed1-pvs2 = <1050000 1050000 1150000>,
+						    <1050000 1050000 1150000>,
+						    <1000000 975000 1025000>;
+			opp-microvolt-speed1-pvs3 = <1050000 1050000 1150000>,
+						    <1050000 1050000 1150000>,
+						    <975000 950000 1000000>;
+			opp-microvolt-speed1-pvs4 = <1050000 1050000 1150000>,
+						    <1050000 1050000 1150000>,
+						    <950000 925000 975000>;
+			opp-microvolt-speed1-pvs5 = <1050000 1050000 1150000>,
+						    <1050000 1050000 1150000>,
+						    <950000 925000 975000>;
+			opp-microvolt-speed1-pvs6 = <1050000 1050000 1150000>,
+						    <1050000 1050000 1150000>,
+						    <950000 925000 975000>;
+			opp-microvolt-speed2-pvs0 = <1050000 1050000 1150000>,
+						    <1050000 1050000 1150000>,
+						    <1000000 1000000 1025000>;
+			opp-microvolt-speed2-pvs1 = <1050000 1050000 1150000>,
+						    <1050000 1050000 1150000>,
+						    <975000 975000 975000>;
+			opp-microvolt-speed2-pvs2 = <1050000 1050000 1150000>,
+						    <1050000 1050000 1150000>,
+						    <975000 950000 1000000>;
+			opp-microvolt-speed2-pvs3 = <1050000 1050000 1150000>,
+						    <1050000 1050000 1150000>,
+						    <962500 937500 987500>;
+			opp-microvolt-speed2-pvs4 = <1050000 1050000 1150000>,
+						    <1050000 1050000 1150000>,
+						    <950000 925000 975000>;
+			opp-microvolt-speed2-pvs5 = <1050000 1050000 1150000>,
+						    <1050000 1050000 1150000>,
+						    <950000 925000 975000>;
+			opp-microvolt-speed2-pvs6 = <1050000 1050000 1150000>,
+						    <1050000 1050000 1150000>,
+						    <950000 925000 975000>;
+			opp-microvolt-speed14-pvs0 = <1050000 1050000 1150000>,
+						     <1050000 1050000 1150000>,
+						     <1037500 1037500 1062500>;
+			opp-microvolt-speed14-pvs1 = <1050000 1050000 1150000>,
+						     <1050000 1050000 1150000>,
+						     <1037500 1012500 1062500>;
+			opp-microvolt-speed14-pvs2 = <1050000 1050000 1150000>,
+						     <1050000 1050000 1150000>,
+						     <1000000 975000 1025000>;
+			opp-microvolt-speed14-pvs3 = <1050000 1050000 1150000>,
+						     <1050000 1050000 1150000>,
+						     <975000 950000 1000000>;
+			opp-microvolt-speed14-pvs4 = <1050000 1050000 1150000>,
+						     <1050000 1050000 1150000>,
+						     <950000 925000 975000>;
+			opp-microvolt-speed14-pvs5 = <1050000 1050000 1150000>,
+						     <1050000 1050000 1150000>,
+						     <925000 925000 925000>;
+			opp-microvolt-speed14-pvs6 = <1050000 1050000 1150000>,
+						     <1050000 1050000 1150000>,
+						     <950000 925000 975000>;
 			opp-supported-hw = <0x4007>;
 		};
 
 		opp-1134000000 {
 			opp-hz = /bits/ 64 <1134000000>;
 			opp-peak-kBps = <1134000>;
+			opp-microvolt-speed0-pvs0 = <1150000 1150000 1150000>,
+						    <1150000 1150000 1150000>,
+						    <1175000 1175000 1200000>;
+			opp-microvolt-speed0-pvs1 = <1150000 1150000 1150000>,
+						    <1150000 1150000 1150000>,
+						    <1150000 1125000 1175000>;
+			opp-microvolt-speed0-pvs3 = <1150000 1150000 1150000>,
+						    <1150000 1150000 1150000>,
+						    <1100000 1075000 1125000>;
+			opp-microvolt-speed0-pvs4 = <1150000 1150000 1150000>,
+						    <1150000 1150000 1150000>,
+						    <1075000 1050000 1100000>;
+			opp-microvolt-speed1-pvs0 = <1150000 1150000 1150000>,
+						    <1150000 1150000 1150000>,
+						    <1075000 1075000 1100000>;
+			opp-microvolt-speed1-pvs1 = <1150000 1150000 1150000>,
+						    <1150000 1150000 1150000>,
+						    <1062500 1037500 1087500>;
+			opp-microvolt-speed1-pvs2 = <1150000 1150000 1150000>,
+						    <1150000 1150000 1150000>,
+						    <1025000 1000000 1050000>;
+			opp-microvolt-speed1-pvs3 = <1150000 1150000 1150000>,
+						    <1150000 1150000 1150000>,
+						    <1000000 975000 1025000>;
+			opp-microvolt-speed1-pvs4 = <1150000 1150000 1150000>,
+						    <1150000 1150000 1150000>,
+						    <975000 950000 1000000>;
+			opp-microvolt-speed1-pvs5 = <1150000 1150000 1150000>,
+						    <1150000 1150000 1150000>,
+						    <962500 937500 987500>;
+			opp-microvolt-speed1-pvs6 = <1150000 1150000 1150000>,
+						    <1150000 1150000 1150000>,
+						    <962500 937500 987500>;
+			opp-microvolt-speed2-pvs0 = <1150000 1150000 1150000>,
+						    <1150000 1150000 1150000>,
+						    <1025000 1025000 1050000>;
+			opp-microvolt-speed2-pvs1 = <1150000 1150000 1150000>,
+						    <1150000 1150000 1150000>,
+						    <1000000 1000000 1000000>;
+			opp-microvolt-speed2-pvs2 = <1150000 1150000 1150000>,
+						    <1150000 1150000 1150000>,
+						    <1000000 975000 1025000>;
+			opp-microvolt-speed2-pvs3 = <1150000 1150000 1150000>,
+						    <1150000 1150000 1150000>,
+						    <987500 962500 1012500>;
+			opp-microvolt-speed2-pvs4 = <1150000 1150000 1150000>,
+						    <1150000 1150000 1150000>,
+						    <975000 950000 1000000>;
+			opp-microvolt-speed2-pvs5 = <1150000 1150000 1150000>,
+						    <1150000 1150000 1150000>,
+						    <962500 937500 987500>;
+			opp-microvolt-speed2-pvs6 = <1150000 1150000 1150000>,
+						    <1150000 1150000 1150000>,
+						    <962500 937500 987500>;
+			opp-microvolt-speed14-pvs0 = <1150000 1150000 1150000>,
+						     <1150000 1150000 1150000>,
+						     <1075000 1075000 1100000>;
+			opp-microvolt-speed14-pvs1 = <1150000 1150000 1150000>,
+						     <1150000 1150000 1150000>,
+						     <1062500 1037500 1087500>;
+			opp-microvolt-speed14-pvs2 = <1150000 1150000 1150000>,
+						     <1150000 1150000 1150000>,
+						     <1025000 1000000 1050000>;
+			opp-microvolt-speed14-pvs3 = <1150000 1150000 1150000>,
+						     <1150000 1150000 1150000>,
+						     <1000000 975000 1025000>;
+			opp-microvolt-speed14-pvs4 = <1150000 1150000 1150000>,
+						     <1150000 1150000 1150000>,
+						     <975000 950000 1000000>;
+			opp-microvolt-speed14-pvs5 = <1150000 1150000 1150000>,
+						     <1150000 1150000 1150000>,
+						     <937500 937500 937500>;
+			opp-microvolt-speed14-pvs6 = <1150000 1150000 1150000>,
+						     <1150000 1150000 1150000>,
+						     <962500 937500 987500>;
 			opp-supported-hw = <0x4007>;
 		};
 
 		opp-1242000000 {
 			opp-hz = /bits/ 64 <1242000000>;
 			opp-peak-kBps = <1134000>;
+			opp-microvolt-speed0-pvs0 = <1150000 1150000 1150000>,
+						    <1150000 1150000 1150000>,
+						    <1200000 1200000 1225000>;
+			opp-microvolt-speed0-pvs1 = <1150000 1150000 1150000>,
+						    <1150000 1150000 1150000>,
+						    <1175000 1150000 1200000>;
+			opp-microvolt-speed0-pvs3 = <1150000 1150000 1150000>,
+						    <1150000 1150000 1150000>,
+						    <1125000 1100000 1150000>;
+			opp-microvolt-speed0-pvs4 = <1150000 1150000 1150000>,
+						    <1150000 1150000 1150000>,
+						    <1100000 1075000 1125000>;
+			opp-microvolt-speed1-pvs0 = <1150000 1150000 1150000>,
+						    <1150000 1150000 1150000>,
+						    <1087500 1087500 1112500>;
+			opp-microvolt-speed1-pvs1 = <1150000 1150000 1150000>,
+						    <1150000 1150000 1150000>,
+						    <1075000 1050000 1100000>;
+			opp-microvolt-speed1-pvs2 = <1150000 1150000 1150000>,
+						    <1150000 1150000 1150000>,
+						    <1037500 1012500 1062500>;
+			opp-microvolt-speed1-pvs3 = <1150000 1150000 1150000>,
+						    <1150000 1150000 1150000>,
+						    <1012500 987500 1037500>;
+			opp-microvolt-speed1-pvs4 = <1150000 1150000 1150000>,
+						    <1150000 1150000 1150000>,
+						    <987500 962500 1012500>;
+			opp-microvolt-speed1-pvs5 = <1150000 1150000 1150000>,
+						    <1150000 1150000 1150000>,
+						    <975000 950000 1000000>;
+			opp-microvolt-speed1-pvs6 = <1150000 1150000 1150000>,
+						    <1150000 1150000 1150000>,
+						    <975000 950000 1000000>;
+			opp-microvolt-speed2-pvs0 = <1150000 1150000 1150000>,
+						    <1150000 1150000 1150000>,
+						    <1037500 1037500 1062500>;
+			opp-microvolt-speed2-pvs1 = <1150000 1150000 1150000>,
+						    <1150000 1150000 1150000>,
+						    <1012500 1012500 1012500>;
+			opp-microvolt-speed2-pvs2 = <1150000 1150000 1150000>,
+						    <1150000 1150000 1150000>,
+						    <1012500 987500 1037500>;
+			opp-microvolt-speed2-pvs3 = <1150000 1150000 1150000>,
+						    <1150000 1150000 1150000>,
+						    <1000000 975000 1025000>;
+			opp-microvolt-speed2-pvs4 = <1150000 1150000 1150000>,
+						    <1150000 1150000 1150000>,
+						    <987500 962500 1012500>;
+			opp-microvolt-speed2-pvs5 = <1150000 1150000 1150000>,
+						    <1150000 1150000 1150000>,
+						    <975000 950000 1000000>;
+			opp-microvolt-speed2-pvs6 = <1150000 1150000 1150000>,
+						    <1150000 1150000 1150000>,
+						    <975000 950000 1000000>;
+			opp-microvolt-speed14-pvs0 = <1150000 1150000 1150000>,
+						     <1150000 1150000 1150000>,
+						     <1087500 1087500 1112500>;
+			opp-microvolt-speed14-pvs1 = <1150000 1150000 1150000>,
+						     <1150000 1150000 1150000>,
+						     <1075000 1050000 1100000>;
+			opp-microvolt-speed14-pvs2 = <1150000 1150000 1150000>,
+						     <1150000 1150000 1150000>,
+						     <1037500 1012500 1062500>;
+			opp-microvolt-speed14-pvs3 = <1150000 1150000 1150000>,
+						     <1150000 1150000 1150000>,
+						     <1012500 987500 1037500>;
+			opp-microvolt-speed14-pvs4 = <1150000 1150000 1150000>,
+						     <1150000 1150000 1150000>,
+						     <987500 962500 1012500>;
+			opp-microvolt-speed14-pvs5 = <1150000 1150000 1150000>,
+						     <1150000 1150000 1150000>,
+						     <950000 950000 950000>;
+			opp-microvolt-speed14-pvs6 = <1150000 1150000 1150000>,
+						     <1150000 1150000 1150000>,
+						     <975000 950000 1000000>;
 			opp-supported-hw = <0x4007>;
 		};
 
 		opp-1350000000 {
 			opp-hz = /bits/ 64 <1350000000>;
 			opp-peak-kBps = <1134000>;
+			opp-microvolt-speed0-pvs0 = <1150000 1150000 1150000>,
+						    <1150000 1150000 1150000>,
+						    <1225000 1225000 1250000>;
+			opp-microvolt-speed0-pvs1 = <1150000 1150000 1150000>,
+						    <1150000 1150000 1150000>,
+						    <1200000 1175000 1225000>;
+			opp-microvolt-speed0-pvs3 = <1150000 1150000 1150000>,
+						    <1150000 1150000 1150000>,
+						    <1150000 1125000 1175000>;
+			opp-microvolt-speed0-pvs4 = <1150000 1150000 1150000>,
+						    <1150000 1150000 1150000>,
+						    <1125000 1100000 1150000>;
+			opp-microvolt-speed1-pvs0 = <1150000 1150000 1150000>,
+						    <1150000 1150000 1150000>,
+						    <1125000 1125000 1150000>;
+			opp-microvolt-speed1-pvs1 = <1150000 1150000 1150000>,
+						    <1150000 1150000 1150000>,
+						    <1112500 1087500 1137500>;
+			opp-microvolt-speed1-pvs2 = <1150000 1150000 1150000>,
+						    <1150000 1150000 1150000>,
+						    <1062500 1037500 1087500>;
+			opp-microvolt-speed1-pvs3 = <1150000 1150000 1150000>,
+						    <1150000 1150000 1150000>,
+						    <1025000 1000000 1050000>;
+			opp-microvolt-speed1-pvs4 = <1150000 1150000 1150000>,
+						    <1150000 1150000 1150000>,
+						    <1000000 975000 1025000>;
+			opp-microvolt-speed1-pvs5 = <1150000 1150000 1150000>,
+						    <1150000 1150000 1150000>,
+						    <987500 962500 1012500>;
+			opp-microvolt-speed1-pvs6 = <1150000 1150000 1150000>,
+						    <1150000 1150000 1150000>,
+						    <987500 962500 1012500>;
+			opp-microvolt-speed2-pvs0 = <1150000 1150000 1150000>,
+						    <1150000 1150000 1150000>,
+						    <1062500 1062500 1087500>;
+			opp-microvolt-speed2-pvs1 = <1150000 1150000 1150000>,
+						    <1150000 1150000 1150000>,
+						    <1037500 1037500 1037500>;
+			opp-microvolt-speed2-pvs2 = <1150000 1150000 1150000>,
+						    <1150000 1150000 1150000>,
+						    <1037500 1012500 1062500>;
+			opp-microvolt-speed2-pvs3 = <1150000 1150000 1150000>,
+						    <1150000 1150000 1150000>,
+						    <1025000 1000000 1050000>;
+			opp-microvolt-speed2-pvs4 = <1150000 1150000 1150000>,
+						    <1150000 1150000 1150000>,
+						    <1000000 975000 1025000>;
+			opp-microvolt-speed2-pvs5 = <1150000 1150000 1150000>,
+						    <1150000 1150000 1150000>,
+						    <987500 962500 1012500>;
+			opp-microvolt-speed2-pvs6 = <1150000 1150000 1150000>,
+						    <1150000 1150000 1150000>,
+						    <987500 962500 1012500>;
+			opp-microvolt-speed14-pvs0 = <1150000 1150000 1150000>,
+						     <1150000 1150000 1150000>,
+						     <1125000 1125000 1150000>;
+			opp-microvolt-speed14-pvs1 = <1150000 1150000 1150000>,
+						     <1150000 1150000 1150000>,
+						     <1112500 1087500 1137500>;
+			opp-microvolt-speed14-pvs2 = <1150000 1150000 1150000>,
+						     <1150000 1150000 1150000>,
+						     <1062500 1037500 1087500>;
+			opp-microvolt-speed14-pvs3 = <1150000 1150000 1150000>,
+						     <1150000 1150000 1150000>,
+						     <1025000 1000000 1050000>;
+			opp-microvolt-speed14-pvs4 = <1150000 1150000 1150000>,
+						     <1150000 1150000 1150000>,
+						     <1000000 975000 1025000>;
+			opp-microvolt-speed14-pvs5 = <1150000 1150000 1150000>,
+						     <1150000 1150000 1150000>,
+						     <962500 962500 962500>;
+			opp-microvolt-speed14-pvs6 = <1150000 1150000 1150000>,
+						     <1150000 1150000 1150000>,
+						     <987500 962500 1012500>;
 			opp-supported-hw = <0x4007>;
 		};
 
 		opp-1458000000 {
 			opp-hz = /bits/ 64 <1458000000>;
 			opp-peak-kBps = <1134000>;
+			opp-microvolt-speed0-pvs0 = <1150000 1150000 1150000>,
+						    <1150000 1150000 1150000>,
+						    <1237500 1237500 1262500>;
+			opp-microvolt-speed0-pvs1 = <1150000 1150000 1150000>,
+						    <1150000 1150000 1150000>,
+						    <1212500 1187500 1237500>;
+			opp-microvolt-speed0-pvs3 = <1150000 1150000 1150000>,
+						    <1150000 1150000 1150000>,
+						    <1162500 1137500 1187500>;
+			opp-microvolt-speed0-pvs4 = <1150000 1150000 1150000>,
+						    <1150000 1150000 1150000>,
+						    <1137500 1112500 1162500>;
+			opp-microvolt-speed1-pvs0 = <1150000 1150000 1150000>,
+						    <1150000 1150000 1150000>,
+						    <1150000 1150000 1175000>;
+			opp-microvolt-speed1-pvs1 = <1150000 1150000 1150000>,
+						    <1150000 1150000 1150000>,
+						    <1137500 1112500 1162500>;
+			opp-microvolt-speed1-pvs2 = <1150000 1150000 1150000>,
+						    <1150000 1150000 1150000>,
+						    <1100000 1075000 1125000>;
+			opp-microvolt-speed1-pvs3 = <1150000 1150000 1150000>,
+						    <1150000 1150000 1150000>,
+						    <1062500 1037500 1087500>;
+			opp-microvolt-speed1-pvs4 = <1150000 1150000 1150000>,
+						    <1150000 1150000 1150000>,
+						    <1025000 1000000 1050000>;
+			opp-microvolt-speed1-pvs5 = <1150000 1150000 1150000>,
+						    <1150000 1150000 1150000>,
+						    <1012500 987500 1037500>;
+			opp-microvolt-speed1-pvs6 = <1150000 1150000 1150000>,
+						    <1150000 1150000 1150000>,
+						    <1000000 975000 1025000>;
+			opp-microvolt-speed2-pvs0 = <1150000 1150000 1150000>,
+						    <1150000 1150000 1150000>,
+						    <1100000 1100000 1125000>;
+			opp-microvolt-speed2-pvs1 = <1150000 1150000 1150000>,
+						    <1150000 1150000 1150000>,
+						    <1075000 1075000 1075000>;
+			opp-microvolt-speed2-pvs2 = <1150000 1150000 1150000>,
+						    <1150000 1150000 1150000>,
+						    <1075000 1050000 1100000>;
+			opp-microvolt-speed2-pvs3 = <1150000 1150000 1150000>,
+						    <1150000 1150000 1150000>,
+						    <1050000 1025000 1075000>;
+			opp-microvolt-speed2-pvs4 = <1150000 1150000 1150000>,
+						    <1150000 1150000 1150000>,
+						    <1025000 1000000 1050000>;
+			opp-microvolt-speed2-pvs5 = <1150000 1150000 1150000>,
+						    <1150000 1150000 1150000>,
+						    <1012500 987500 1037500>;
+			opp-microvolt-speed2-pvs6 = <1150000 1150000 1150000>,
+						    <1150000 1150000 1150000>,
+						    <1000000 975000 1025000>;
+			opp-microvolt-speed14-pvs0 = <1150000 1150000 1150000>,
+						     <1150000 1150000 1150000>,
+						     <1150000 1150000 1175000>;
+			opp-microvolt-speed14-pvs1 = <1150000 1150000 1150000>,
+						     <1150000 1150000 1150000>,
+						     <1137500 1112500 1162500>;
+			opp-microvolt-speed14-pvs2 = <1150000 1150000 1150000>,
+						     <1150000 1150000 1150000>,
+						     <1100000 1075000 1125000>;
+			opp-microvolt-speed14-pvs3 = <1150000 1150000 1150000>,
+						     <1150000 1150000 1150000>,
+						     <1062500 1037500 1087500>;
+			opp-microvolt-speed14-pvs4 = <1150000 1150000 1150000>,
+						     <1150000 1150000 1150000>,
+						     <1025000 1000000 1050000>;
+			opp-microvolt-speed14-pvs5 = <1150000 1150000 1150000>,
+						     <1150000 1150000 1150000>,
+						     <987500 987500 987500>;
+			opp-microvolt-speed14-pvs6 = <1150000 1150000 1150000>,
+						     <1150000 1150000 1150000>,
+						     <1000000 975000 1025000>;
 			opp-supported-hw = <0x4007>;
 		};
 
 		opp-1512000000 {
 			opp-hz = /bits/ 64 <1512000000>;
 			opp-peak-kBps = <1134000>;
+			opp-microvolt-speed0-pvs0 = <1150000 1150000 1150000>,
+						    <1150000 1150000 1150000>,
+						    <1250000 1250000 1275000>;
+			opp-microvolt-speed0-pvs1 = <1150000 1150000 1150000>,
+						    <1150000 1150000 1150000>,
+						    <1225000 1200000 1250000>;
+			opp-microvolt-speed0-pvs3 = <1150000 1150000 1150000>,
+						    <1150000 1150000 1150000>,
+						    <1175000 1150000 1200000>;
+			opp-microvolt-speed0-pvs4 = <1150000 1150000 1150000>,
+						    <1150000 1150000 1150000>,
+						    <1150000 1125000 1175000>;
+			opp-microvolt-speed14-pvs0 = <1150000 1150000 1150000>,
+						     <1150000 1150000 1150000>,
+						     <1162500 1162500 1187500>;
+			opp-microvolt-speed14-pvs1 = <1150000 1150000 1150000>,
+						     <1150000 1150000 1150000>,
+						     <1150000 1125000 1175000>;
+			opp-microvolt-speed14-pvs2 = <1150000 1150000 1150000>,
+						     <1150000 1150000 1150000>,
+						     <1112500 1087500 1137500>;
+			opp-microvolt-speed14-pvs3 = <1150000 1150000 1150000>,
+						     <1150000 1150000 1150000>,
+						     <1075000 1050000 1100000>;
+			opp-microvolt-speed14-pvs4 = <1150000 1150000 1150000>,
+						     <1150000 1150000 1150000>,
+						     <1037500 1012500 1062500>;
+			opp-microvolt-speed14-pvs5 = <1150000 1150000 1150000>,
+						     <1150000 1150000 1150000>,
+						     <1000000 1000000 1000000>;
+			opp-microvolt-speed14-pvs6 = <1150000 1150000 1150000>,
+						     <1150000 1150000 1150000>,
+						     <1012500 987500 1037500>;
 			opp-supported-hw = <0x4001>;
 		};
 
 		opp-1566000000 {
 			opp-hz = /bits/ 64 <1566000000>;
 			opp-peak-kBps = <1134000>;
+			opp-microvolt-speed1-pvs0 = <1150000 1150000 1150000>,
+						    <1150000 1150000 1150000>,
+						    <1175000 1175000 1200000>;
+			opp-microvolt-speed1-pvs1 = <1150000 1150000 1150000>,
+						    <1150000 1150000 1150000>,
+						    <1175000 1150000 1200000>;
+			opp-microvolt-speed1-pvs2 = <1150000 1150000 1150000>,
+						    <1150000 1150000 1150000>,
+						    <1125000 1100000 1150000>;
+			opp-microvolt-speed1-pvs3 = <1150000 1150000 1150000>,
+						    <1150000 1150000 1150000>,
+						    <1087500 1062500 1112500>;
+			opp-microvolt-speed1-pvs4 = <1150000 1150000 1150000>,
+						    <1150000 1150000 1150000>,
+						    <1062500 1037500 1087500>;
+			opp-microvolt-speed1-pvs5 = <1150000 1150000 1150000>,
+						    <1150000 1150000 1150000>,
+						    <1037500 1012500 1062500>;
+			opp-microvolt-speed1-pvs6 = <1150000 1150000 1150000>,
+						    <1150000 1150000 1150000>,
+						    <1025000 1000000 1050000>;
+			opp-microvolt-speed2-pvs0 = <1150000 1150000 1150000>,
+						    <1150000 1150000 1150000>,
+						    <1125000 1125000 1150000>;
+			opp-microvolt-speed2-pvs1 = <1150000 1150000 1150000>,
+						    <1150000 1150000 1150000>,
+						    <1100000 1100000 1100000>;
+			opp-microvolt-speed2-pvs2 = <1150000 1150000 1150000>,
+						    <1150000 1150000 1150000>,
+						    <1100000 1075000 1125000>;
+			opp-microvolt-speed2-pvs3 = <1150000 1150000 1150000>,
+						    <1150000 1150000 1150000>,
+						    <1075000 1050000 1100000>;
+			opp-microvolt-speed2-pvs4 = <1150000 1150000 1150000>,
+						    <1150000 1150000 1150000>,
+						    <1062500 1037500 1087500>;
+			opp-microvolt-speed2-pvs5 = <1150000 1150000 1150000>,
+						    <1150000 1150000 1150000>,
+						    <1037500 1012500 1062500>;
+			opp-microvolt-speed2-pvs6 = <1150000 1150000 1150000>,
+						    <1150000 1150000 1150000>,
+						    <1025000 1000000 1050000>;
 			opp-supported-hw = <0x06>;
 		};
 
 		opp-1674000000 {
 			opp-hz = /bits/ 64 <1674000000>;
 			opp-peak-kBps = <1134000>;
+			opp-microvolt-speed1-pvs0 = <1150000 1150000 1150000>,
+						    <1150000 1150000 1150000>,
+						    <1225000 1225000 1250000>;
+			opp-microvolt-speed1-pvs1 = <1150000 1150000 1150000>,
+						    <1150000 1150000 1150000>,
+						    <1212500 1187500 1237500>;
+			opp-microvolt-speed1-pvs2 = <1150000 1150000 1150000>,
+						    <1150000 1150000 1150000>,
+						    <1162500 1137500 1187500>;
+			opp-microvolt-speed1-pvs3 = <1150000 1150000 1150000>,
+						    <1150000 1150000 1150000>,
+						    <1125000 1100000 1150000>;
+			opp-microvolt-speed1-pvs4 = <1150000 1150000 1150000>,
+						    <1150000 1150000 1150000>,
+						    <1100000 1075000 1125000>;
+			opp-microvolt-speed1-pvs5 = <1150000 1150000 1150000>,
+						    <1150000 1150000 1150000>,
+						    <1075000 1050000 1100000>;
+			opp-microvolt-speed1-pvs6 = <1150000 1150000 1150000>,
+						    <1150000 1150000 1150000>,
+						    <1050000 1025000 1075000>;
+			opp-microvolt-speed2-pvs0 = <1150000 1150000 1150000>,
+						    <1150000 1150000 1150000>,
+						    <1175000 1175000 1200000>;
+			opp-microvolt-speed2-pvs1 = <1150000 1150000 1150000>,
+						    <1150000 1150000 1150000>,
+						    <1137500 1137500 1137500>;
+			opp-microvolt-speed2-pvs2 = <1150000 1150000 1150000>,
+						    <1150000 1150000 1150000>,
+						    <1137500 1112500 1162500>;
+			opp-microvolt-speed2-pvs3 = <1150000 1150000 1150000>,
+						    <1150000 1150000 1150000>,
+						    <1112500 1087500 1137500>;
+			opp-microvolt-speed2-pvs4 = <1150000 1150000 1150000>,
+						    <1150000 1150000 1150000>,
+						    <1100000 1075000 1125000>;
+			opp-microvolt-speed2-pvs5 = <1150000 1150000 1150000>,
+						    <1150000 1150000 1150000>,
+						    <1075000 1050000 1100000>;
+			opp-microvolt-speed2-pvs6 = <1150000 1150000 1150000>,
+						    <1150000 1150000 1150000>,
+						    <1050000 1025000 1075000>;
 			opp-supported-hw = <0x06>;
 		};
 
 		opp-1728000000 {
 			opp-hz = /bits/ 64 <1728000000>;
 			opp-peak-kBps = <1134000>;
+			opp-microvolt-speed1-pvs0 = <1150000 1150000 1150000>,
+						    <1150000 1150000 1150000>,
+						    <1250000 1250000 1275000>;
+			opp-microvolt-speed1-pvs1 = <1150000 1150000 1150000>,
+						    <1150000 1150000 1150000>,
+						    <1225000 1200000 1250000>;
+			opp-microvolt-speed1-pvs2 = <1150000 1150000 1150000>,
+						    <1150000 1150000 1150000>,
+						    <1187500 1162500 1212500>;
+			opp-microvolt-speed1-pvs3 = <1150000 1150000 1150000>,
+						    <1150000 1150000 1150000>,
+						    <1150000 1125000 1175000>;
+			opp-microvolt-speed1-pvs4 = <1150000 1150000 1150000>,
+						    <1150000 1150000 1150000>,
+						    <1125000 1100000 1150000>;
+			opp-microvolt-speed1-pvs5 = <1150000 1150000 1150000>,
+						    <1150000 1150000 1150000>,
+						    <1100000 1075000 1125000>;
+			opp-microvolt-speed1-pvs6 = <1150000 1150000 1150000>,
+						    <1150000 1150000 1150000>,
+						    <1075000 1050000 1100000>;
 			opp-supported-hw = <0x02>;
 		};
 
 		opp-1782000000 {
 			opp-hz = /bits/ 64 <1782000000>;
 			opp-peak-kBps = <1134000>;
+			opp-microvolt-speed2-pvs0 = <1150000 1150000 1150000>,
+						    <1150000 1150000 1150000>,
+						    <1225000 1225000 1250000>;
+			opp-microvolt-speed2-pvs1 = <1150000 1150000 1150000>,
+						    <1150000 1150000 1150000>,
+						    <1187500 1187500 1187500>;
+			opp-microvolt-speed2-pvs2 = <1150000 1150000 1150000>,
+						    <1150000 1150000 1150000>,
+						    <1187500 1162500 1212500>;
+			opp-microvolt-speed2-pvs3 = <1150000 1150000 1150000>,
+						    <1150000 1150000 1150000>,
+						    <1162500 1137500 1187500>;
+			opp-microvolt-speed2-pvs4 = <1150000 1150000 1150000>,
+						    <1150000 1150000 1150000>,
+						    <1137500 1112500 1162500>;
+			opp-microvolt-speed2-pvs5 = <1150000 1150000 1150000>,
+						    <1150000 1150000 1150000>,
+						    <1112500 1087500 1137500>;
+			opp-microvolt-speed2-pvs6 = <1150000 1150000 1150000>,
+						    <1150000 1150000 1150000>,
+						    <1087500 1062500 1112500>;
 			opp-supported-hw = <0x04>;
 		};
 
 		opp-1890000000 {
 			opp-hz = /bits/ 64 <1890000000>;
 			opp-peak-kBps = <1134000>;
+			opp-microvolt-speed2-pvs0 = <1150000 1150000 1150000>,
+						    <1150000 1150000 1150000>,
+						    <1287500 1287500 1312500>;
+			opp-microvolt-speed2-pvs1 = <1150000 1150000 1150000>,
+						    <1150000 1150000 1150000>,
+						    <1250000 1250000 1250000>;
+			opp-microvolt-speed2-pvs2 = <1150000 1150000 1150000>,
+						    <1150000 1150000 1150000>,
+						    <1237500 1212500 1262500>;
+			opp-microvolt-speed2-pvs3 = <1150000 1150000 1150000>,
+						    <1150000 1150000 1150000>,
+						    <1200000 1175000 1225000>;
+			opp-microvolt-speed2-pvs4 = <1150000 1150000 1150000>,
+						    <1150000 1150000 1150000>,
+						    <1175000 1150000 1200000>;
+			opp-microvolt-speed2-pvs5 = <1150000 1150000 1150000>,
+						    <1150000 1150000 1150000>,
+						    <1150000 1125000 1175000>;
+			opp-microvolt-speed2-pvs6 = <1150000 1150000 1150000>,
+						    <1150000 1150000 1150000>,
+						    <1125000 1100000 1150000>;
 			opp-supported-hw = <0x04>;
 		};
 	};