From patchwork Wed Jan 31 22:19:54 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Davis X-Patchwork-Id: 13540059 Received: from fllv0015.ext.ti.com (fllv0015.ext.ti.com [198.47.19.141]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id CEC2D3A278; Wed, 31 Jan 2024 22:20:09 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.47.19.141 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1706739611; cv=none; b=tXCQZy8EM7XvEgJ0SzBP/zRNe0l1c9RJEG7LUz6i9RlswPwIgCJRsYacDk08zpUKoSbiP6xgOl5HDnyRQBRIPqNKzciHTwN5Pb53FyhmZPPmLATpXk7OofWE+rAIb+12lSW9KRP1k3BRa5kePrqN9076FN8pwAOi8mrV0mzql1s= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1706739611; c=relaxed/simple; bh=7JjgghQ0SCI42dyRV2VURiHTHosLQOd1S81tXSYqLZo=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=Yf3Oha0YrttaA1uy8Dmz/9XqiwDTVwGx3xaqGCDwp9JiSC5X9Fbn5PMH9k2bB83YjgUwPsigh0EMyXCvCXcO7WENdwy+Hd+2a4cr4qa6NjyG2fj+X5c4ZHotmdJ46cAEGcNycekW7HYZxP58LqeUyUc9IdMs9sLmifM92/X/pjQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com; spf=pass smtp.mailfrom=ti.com; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b=THPOF6w9; arc=none smtp.client-ip=198.47.19.141 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ti.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="THPOF6w9" Received: from fllv0035.itg.ti.com ([10.64.41.0]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id 40VMK42q004388; Wed, 31 Jan 2024 16:20:04 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1706739604; bh=qWbSUtrKJS9+NDn8QtaMwirutdkz/edGVbVEUKGhHkM=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=THPOF6w9d72Da9XSqUpfpCBv1QTX5ANMqPDl0ynefu6npMP1cwGj5dYI3kfZlFTJn uP9QwFtcL5BfHtZg+jR73SN4QEPY9CWLlyY6AkJMsfD7LilV679nkawvVj748ElxjR aMDAEkze9O39Ug53tRxUpyZOzlPnio8Wn0Dl7Z4g= Received: from DLEE112.ent.ti.com (dlee112.ent.ti.com [157.170.170.23]) by fllv0035.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 40VMK4vG100745 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Wed, 31 Jan 2024 16:20:04 -0600 Received: from DLEE102.ent.ti.com (157.170.170.32) by DLEE112.ent.ti.com (157.170.170.23) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Wed, 31 Jan 2024 16:20:04 -0600 Received: from lelvsmtp6.itg.ti.com (10.180.75.249) by DLEE102.ent.ti.com (157.170.170.32) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Wed, 31 Jan 2024 16:20:04 -0600 Received: from lelvsmtp5.itg.ti.com ([10.249.42.149]) by lelvsmtp6.itg.ti.com (8.15.2/8.15.2) with ESMTP id 40VMJwxB102504; Wed, 31 Jan 2024 16:20:03 -0600 From: Andrew Davis To: Nishanth Menon , Tero Kristo , Santosh Shilimkar , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Sebastian Reichel , Vignesh Raghavendra CC: , , , , Andrew Davis Subject: [PATCH 09/12] arm64: dts: ti: k3-j7200: Add reboot-controller node Date: Wed, 31 Jan 2024 16:19:54 -0600 Message-ID: <20240131221957.213717-10-afd@ti.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240131221957.213717-1-afd@ti.com> References: <20240131221957.213717-1-afd@ti.com> Precedence: bulk X-Mailing-List: linux-pm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 While PCSI normally handles reboot for K3, this is an available fallback in case PCSI reboot fails. Add direct reboot TI-SCI node to system-controller. Signed-off-by: Andrew Davis --- arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi index 60b26374ae0cc..a37d66bcf93e9 100644 --- a/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi @@ -32,6 +32,10 @@ k3_reset: reset-controller { compatible = "ti,sci-reset"; #reset-cells = <2>; }; + + k3_reboot: reboot-controller { + compatible = "ti,sci-reboot"; + }; }; mcu_timer0: timer@40400000 {