diff mbox series

[2/2] cpufreq/amd-pstate: Catch failures for amd_pstate_epp_update_limit()

Message ID 20240901050035.1739935-3-superm1@kernel.org (mailing list archive)
State Accepted
Delegated to: Mario Limonciello
Headers show
Series amd-pstate: Better handling for systems without an MSR | expand

Commit Message

Mario Limonciello Sept. 1, 2024, 5 a.m. UTC
From: Mario Limonciello <mario.limonciello@amd.com>

amd_pstate_set_epp() calls cppc_set_epp_perf() which can fail for
a variety of reasons but this is ignored.  Change the return flow
to allow failures.

Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
---
 drivers/cpufreq/amd-pstate.c | 11 +++++++----
 1 file changed, 7 insertions(+), 4 deletions(-)

Comments

Yuan, Perry Sept. 2, 2024, 9:24 a.m. UTC | #1
[AMD Official Use Only - AMD Internal Distribution Only]

> -----Original Message-----
> From: Mario Limonciello <superm1@kernel.org>
> Sent: Sunday, September 1, 2024 1:01 PM
> To: Shenoy, Gautham Ranjal <gautham.shenoy@amd.com>; Yuan, Perry
> <Perry.Yuan@amd.com>
> Cc: open list:X86 ARCHITECTURE (32-BIT AND 64-BIT) <linux-
> kernel@vger.kernel.org>; open list:CPU FREQUENCY SCALING FRAMEWORK
> <linux-pm@vger.kernel.org>; Limonciello, Mario
> <Mario.Limonciello@amd.com>
> Subject: [PATCH 2/2] cpufreq/amd-pstate: Catch failures for
> amd_pstate_epp_update_limit()
>
> From: Mario Limonciello <mario.limonciello@amd.com>
>
> amd_pstate_set_epp() calls cppc_set_epp_perf() which can fail for a variety of
> reasons but this is ignored.  Change the return flow to allow failures.
>
> Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>

LGTM,

Reviewed-by: Perry Yuan <perry.yuan@amd.com>

> ---
>  drivers/cpufreq/amd-pstate.c | 11 +++++++----
>  1 file changed, 7 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/cpufreq/amd-pstate.c b/drivers/cpufreq/amd-pstate.c
> index 89438a3654002..b07be4d945e4d 100644
> --- a/drivers/cpufreq/amd-pstate.c
> +++ b/drivers/cpufreq/amd-pstate.c
> @@ -1556,7 +1556,7 @@ static void amd_pstate_epp_cpu_exit(struct
> cpufreq_policy *policy)
>       pr_debug("CPU %d exiting\n", policy->cpu);  }
>
> -static void amd_pstate_epp_update_limit(struct cpufreq_policy *policy)
> +static int amd_pstate_epp_update_limit(struct cpufreq_policy *policy)
>  {
>       struct amd_cpudata *cpudata = policy->driver_data;
>       u32 max_perf, min_perf, min_limit_perf, max_limit_perf; @@ -1606,7
> +1606,7 @@ static void amd_pstate_epp_update_limit(struct cpufreq_policy
> *policy)
>                * This return value can only be negative for shared_memory
>                * systems where EPP register read/write not supported.
>                */
> -             return;
> +             return epp;
>       }
>
>       if (cpudata->policy == CPUFREQ_POLICY_PERFORMANCE) @@ -
> 1619,12 +1619,13 @@ static void amd_pstate_epp_update_limit(struct
> cpufreq_policy *policy)
>       }
>
>       WRITE_ONCE(cpudata->cppc_req_cached, value);
> -     amd_pstate_set_epp(cpudata, epp);
> +     return amd_pstate_set_epp(cpudata, epp);
>  }
>
>  static int amd_pstate_epp_set_policy(struct cpufreq_policy *policy)  {
>       struct amd_cpudata *cpudata = policy->driver_data;
> +     int ret;
>
>       if (!policy->cpuinfo.max_freq)
>               return -ENODEV;
> @@ -1634,7 +1635,9 @@ static int amd_pstate_epp_set_policy(struct
> cpufreq_policy *policy)
>
>       cpudata->policy = policy->policy;
>
> -     amd_pstate_epp_update_limit(policy);
> +     ret = amd_pstate_epp_update_limit(policy);
> +     if (ret)
> +             return ret;
>
>       /*
>        * policy->cur is never updated with the amd_pstate_epp driver, but it
> --
> 2.43.0
diff mbox series

Patch

diff --git a/drivers/cpufreq/amd-pstate.c b/drivers/cpufreq/amd-pstate.c
index 89438a3654002..b07be4d945e4d 100644
--- a/drivers/cpufreq/amd-pstate.c
+++ b/drivers/cpufreq/amd-pstate.c
@@ -1556,7 +1556,7 @@  static void amd_pstate_epp_cpu_exit(struct cpufreq_policy *policy)
 	pr_debug("CPU %d exiting\n", policy->cpu);
 }
 
-static void amd_pstate_epp_update_limit(struct cpufreq_policy *policy)
+static int amd_pstate_epp_update_limit(struct cpufreq_policy *policy)
 {
 	struct amd_cpudata *cpudata = policy->driver_data;
 	u32 max_perf, min_perf, min_limit_perf, max_limit_perf;
@@ -1606,7 +1606,7 @@  static void amd_pstate_epp_update_limit(struct cpufreq_policy *policy)
 		 * This return value can only be negative for shared_memory
 		 * systems where EPP register read/write not supported.
 		 */
-		return;
+		return epp;
 	}
 
 	if (cpudata->policy == CPUFREQ_POLICY_PERFORMANCE)
@@ -1619,12 +1619,13 @@  static void amd_pstate_epp_update_limit(struct cpufreq_policy *policy)
 	}
 
 	WRITE_ONCE(cpudata->cppc_req_cached, value);
-	amd_pstate_set_epp(cpudata, epp);
+	return amd_pstate_set_epp(cpudata, epp);
 }
 
 static int amd_pstate_epp_set_policy(struct cpufreq_policy *policy)
 {
 	struct amd_cpudata *cpudata = policy->driver_data;
+	int ret;
 
 	if (!policy->cpuinfo.max_freq)
 		return -ENODEV;
@@ -1634,7 +1635,9 @@  static int amd_pstate_epp_set_policy(struct cpufreq_policy *policy)
 
 	cpudata->policy = policy->policy;
 
-	amd_pstate_epp_update_limit(policy);
+	ret = amd_pstate_epp_update_limit(policy);
+	if (ret)
+		return ret;
 
 	/*
 	 * policy->cur is never updated with the amd_pstate_epp driver, but it