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Shenoy" , "Mario Limonciello" , Perry Yuan , , , , , "Shyam Sundar S K" Subject: [PATCH v2 03/13] x86/cpufeatures: add X86_FEATURE_WORKLOAD_CLASS feature bit Date: Thu, 10 Oct 2024 14:36:55 -0500 Message-ID: <20241010193705.10362-4-mario.limonciello@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241010193705.10362-1-mario.limonciello@amd.com> References: <20241010193705.10362-1-mario.limonciello@amd.com> Precedence: bulk X-Mailing-List: linux-pm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SA2PEPF000015C7:EE_|SN7PR12MB7855:EE_ X-MS-Office365-Filtering-Correlation-Id: 6b330fe6-0e08-4f34-c7db-08dce96302e3 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|36860700013|1800799024|376014|82310400026; X-Microsoft-Antispam-Message-Info: 9Jup9iaUe/+PRvznZ5mUpPO0+CxH8WTbEPvRYq+eltDhmxvm3fpTX7+Unea1ZGyVq8B+n79cgb4AJZLPWJH5DyovI8vLEKNm0Zqyp/NU+IF3qNOaRg8TK8wp2lkBlCAo3LoRYPMG1s/fZM2gdW/iM0Qcjs4MV5tzKC4+OCCevPYCGPx7cEEdg/4bQ8cEXksk0ZuEDCEmZZM/yXp6IULzAcZPLuqmG15BMs4efJpjFS4zcjhmoqSa0EG8OCo1KL4EfZBG7Miu2D44yO8Ep8aCkeTgRipeTemCkvi0xGatH423gHNWy7cxdHF0ghlFeAz+4UZkLCYmw3PQryDJNF3cSIH2Y+WC/NKd0ZJgmybsy34kv8+/w0RxM4YlqnxNo4/YfS+ncf+bA3Jz6T5h64nUb2cwugyiQlOZEnSMvp2dnOya2e51x6uiLm9VrP/9KUXNYdDDuqYfGbddVChVqBXz57hNYYC6NrWFxHx+VmbAOlw8MT3ihyv67JS307ZnidVqXyA4afVUFQY2P4P6b8kpkgXse3GDRX9S2rpQy2pTP+lp4y5fsRTC2uMaPimoc1GjYAtqtQlW+SyC3oY5sUmwiY7wSb9ixK9IMZrP/SkHdjgybON680f8qKR1F2EsfoqF0tWnXdhnM6aMvngUF3RYLhDpTBLUv84P2BH24xs0GzZLxV8I4pN4fLq7LbG4innLJOsY3K7u1YeCVhCoFoKjHVBo+0SO4z8FqbQ4Ci4z+J++QlPpDQeY/c2kT/m9pk1nlKn/VOAX/ekTsKHxI0e+M3XhFQLkDr7F6prMHypKz9yuyuQixzHoR2daFLp7Vxu8WWYA7jRKGmffcHFTPX2i9LRHfG8PYkliOtuFf0T1GoIixtpvQ4hfgEviTwnWNooXXydFkrWFwznzBBOPR6OYZPYyLZhJyCHfVlstlINhMSf84yDLrxOJ81sato2uCia+KAv44RIG1/5PXaZmKIHO5LlYBDjgm7PskytevltRJ7Sp8Ut+Gq0Klzmj20F2tt5xq6PKXR49VZ3zalmNLqmljUwgggl8drJGK0/BTpE8PsSyMku3ywUM3yruVXRcMlaqiryYcZudatwaQBkNS3Uy06fVym+fsaBU54ah+n0OhK2wpAjp0lvbPQJe2lO+7rdC0TGiNTGTOQ+1LUmS3nFWU69rd1ryfo3tUEVaItY+dWI/4wnHEnkw0dWkBgwSOVtesqmxYEesuXgwszgltVmQXU+lLAZP4mTufN/t8Ow9pVr64+LYzhjlxezO6PdJWdARBNg3hT+K1e9XVlAorYG9YqbYY4zJ73QSiDTeAS9AlKw1aHnEu5nJeIa8m7mS0n8H3OkTGjKd2xADDmDO6ZbjKlY3ONH5WD9+bwEdzX0lX0bD5Ttjom+7w1TSA/rDozDs X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(36860700013)(1800799024)(376014)(82310400026);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 10 Oct 2024 19:37:43.8502 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 6b330fe6-0e08-4f34-c7db-08dce96302e3 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SA2PEPF000015C7.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SN7PR12MB7855 From: Perry Yuan Add new feature bit that indicates support for workload based heuristic feedback to OS for scheduling decisions. When the bit set, threads are classified during runtime into enumerated classes. The classes represent thread performance/power characteristics that may benefit from special scheduling behaviors. Signed-off-by: Perry Yuan Signed-off-by: Mario Limonciello --- arch/x86/include/asm/cpufeatures.h | 1 + arch/x86/kernel/cpu/scattered.c | 1 + 2 files changed, 2 insertions(+) diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h index cea1ed82aeb4..3e8e67b8ec7a 100644 --- a/arch/x86/include/asm/cpufeatures.h +++ b/arch/x86/include/asm/cpufeatures.h @@ -474,6 +474,7 @@ #define X86_FEATURE_CLEAR_BHB_LOOP_ON_VMEXIT (21*32+ 4) /* Clear branch history at vmexit using SW loop */ #define X86_FEATURE_FAST_CPPC (21*32 + 5) /* AMD Fast CPPC */ #define X86_FEATURE_HETERO_CORE_TOPOLOGY (21*32 + 6) /* Heterogeneous Core Topology */ +#define X86_FEATURE_WORKLOAD_CLASS (21*32 + 7) /* Workload Classification */ /* * BUG word(s) diff --git a/arch/x86/kernel/cpu/scattered.c b/arch/x86/kernel/cpu/scattered.c index 3bba55323163..b6547bab9e23 100644 --- a/arch/x86/kernel/cpu/scattered.c +++ b/arch/x86/kernel/cpu/scattered.c @@ -49,6 +49,7 @@ static const struct cpuid_bit cpuid_bits[] = { { X86_FEATURE_MBA, CPUID_EBX, 6, 0x80000008, 0 }, { X86_FEATURE_SMBA, CPUID_EBX, 2, 0x80000020, 0 }, { X86_FEATURE_BMEC, CPUID_EBX, 3, 0x80000020, 0 }, + { X86_FEATURE_WORKLOAD_CLASS, CPUID_EAX, 22, 0x80000021, 0 }, { X86_FEATURE_PERFMON_V2, CPUID_EAX, 0, 0x80000022, 0 }, { X86_FEATURE_AMD_LBR_V2, CPUID_EAX, 1, 0x80000022, 0 }, { X86_FEATURE_AMD_LBR_PMC_FREEZE, CPUID_EAX, 2, 0x80000022, 0 },