| Message ID | 20241205222847.7889-8-mario.limonciello@amd.com (mailing list archive) |
|---|---|
| State | Superseded, archived |
| Headers | show |
| Series | amd-pstate 6.14 cleanups and improvements | expand |
On Thu, Dec 05, 2024 at 04:28:39PM -0600, Mario Limonciello wrote: > If writing the MSR MSR_AMD_CPPC_REQ fails then the cached value in the > amd_cpudata structure should not be updated. Considering that the remote MSR update can fail only if either the cpudata->cpu is invalid or if that CPU is not online, this is the right thing to do. Reviewed-by: Gautham R. Shenoy <gautham.shenoy@amd.com> -- Thanks and Regards gautham. > > Signed-off-by: Mario Limonciello <mario.limonciello@amd.com> > --- > drivers/cpufreq/amd-pstate.c | 10 +++++++--- > 1 file changed, 7 insertions(+), 3 deletions(-) > > diff --git a/drivers/cpufreq/amd-pstate.c b/drivers/cpufreq/amd-pstate.c > index 14bd6faa3d730..ce70d1bfa55d0 100644 > --- a/drivers/cpufreq/amd-pstate.c > +++ b/drivers/cpufreq/amd-pstate.c > @@ -278,11 +278,15 @@ static int msr_set_epp(struct amd_cpudata *cpudata, u32 epp) > > value &= ~AMD_PSTATE_EPP_PERF_MASK; > value |= FIELD_PREP(AMD_PSTATE_EPP_PERF_MASK, epp); > - WRITE_ONCE(cpudata->cppc_req_cached, value); > > ret = wrmsrl_on_cpu(cpudata->cpu, MSR_AMD_CPPC_REQ, value); > - if (!ret) > - cpudata->epp_cached = epp; > + if (ret) { > + pr_err("failed to set energy perf value (%d)\n", ret); > + return ret; > + } > + > + cpudata->epp_cached = epp; > + WRITE_ONCE(cpudata->cppc_req_cached, value); > > return ret; > } > -- > 2.43.0 >
diff --git a/drivers/cpufreq/amd-pstate.c b/drivers/cpufreq/amd-pstate.c index 14bd6faa3d730..ce70d1bfa55d0 100644 --- a/drivers/cpufreq/amd-pstate.c +++ b/drivers/cpufreq/amd-pstate.c @@ -278,11 +278,15 @@ static int msr_set_epp(struct amd_cpudata *cpudata, u32 epp) value &= ~AMD_PSTATE_EPP_PERF_MASK; value |= FIELD_PREP(AMD_PSTATE_EPP_PERF_MASK, epp); - WRITE_ONCE(cpudata->cppc_req_cached, value); ret = wrmsrl_on_cpu(cpudata->cpu, MSR_AMD_CPPC_REQ, value); - if (!ret) - cpudata->epp_cached = epp; + if (ret) { + pr_err("failed to set energy perf value (%d)\n", ret); + return ret; + } + + cpudata->epp_cached = epp; + WRITE_ONCE(cpudata->cppc_req_cached, value); return ret; }
If writing the MSR MSR_AMD_CPPC_REQ fails then the cached value in the amd_cpudata structure should not be updated. Signed-off-by: Mario Limonciello <mario.limonciello@amd.com> --- drivers/cpufreq/amd-pstate.c | 10 +++++++--- 1 file changed, 7 insertions(+), 3 deletions(-)