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client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C Received: from SATLEXMB04.amd.com (165.204.84.17) by CY4PEPF0000E9D8.mail.protection.outlook.com (10.167.241.71) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.8230.7 via Frontend Transport; Sun, 8 Dec 2024 06:31:03 +0000 Received: from AUS-P9-MLIMONCI.amd.com (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.39; Sun, 8 Dec 2024 00:31:01 -0600 From: Mario Limonciello To: "Gautham R . Shenoy" CC: Perry Yuan , , , Dhananjay Ugwekar , Mario Limonciello , "Artem S . Tashkinov" , Dhananjay Ugwekar Subject: [PATCH v2 15/16] cpufreq/amd-pstate: Set different default EPP policy for Epyc and Ryzen Date: Sun, 8 Dec 2024 00:30:30 -0600 Message-ID: <20241208063031.3113-16-mario.limonciello@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241208063031.3113-1-mario.limonciello@amd.com> References: <20241208063031.3113-1-mario.limonciello@amd.com> Precedence: bulk X-Mailing-List: linux-pm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: SATLEXMB04.amd.com (10.181.40.145) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CY4PEPF0000E9D8:EE_|PH7PR12MB8594:EE_ X-MS-Office365-Filtering-Correlation-Id: f3736dfb-6d42-4a7a-55a3-08dd1751e3fc X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|376014|1800799024|82310400026|36860700013; X-Microsoft-Antispam-Message-Info: DbXlOPtULInm7eR0/jd8zQ6DEqiWsu7xtZ9S/GxZ97IXoG/urGhvj+oghfjwElQR/kV8VaPA2NMwNafu4tYTj2nk68kdpolR8xgW5cpgRBqCarA4z2XUAl4f7iw6s4wHM8Li5QOHvz7fv/lOb1/fRok3THrpi/zu3ywyuzLZeCPPUpHi640mYcY34no9HFa/VWOGZIVHYyj51ca43Hl4dAMhk/XCVhE7HRjenjB4CDmS59f9zGk3G7AqOPP+H4zl+X6Pzk7AJJQEHlyqflVxVYZ2DeS+qaki3klVOJ+xV4G1NJPPv+EkUn7OsVRtkPZBRkqSjSYxTI1aqZieQE0mCs1PkDy22EX6bI49yvlR0d6ZZ9ewInAZMRpuNnbUIgCUtBHVKIBFrKo/DqR7cyyr1K4qvf1T0Dsck6B/ME2sD8Tne2OuGKwnm2TWKluNwYe89peb65jfoe8oXkYPq8rqeAcMEGWPp7X4isP7yAJ54rfFjSXmr0TbfG+new81sh/Wq362l7+egGDZFtrRHIjx9vRITUL9u1MYoLgE6DF+zaLlFsmyRXldi4wkg6ljilzPW2o6hiU5WqqCqAz9U6wyd6/agQ+MKTPYPuG5GoUxiN2CBhdtuji2lGTwV7zX8H5lVnvZAy0poH323aIfKSwjl1sbm8S1yNIeDv+OBX8lT1nA5h8bQ6KTLLpRw0Z2FOOKNq2xQhch38qvu5d617vzFhfqnD6ZfxrwjndNf+G1pH/UfNdVb5VzNQOwgTr2RSCBSytekPmN5WYXh+vkg3YCwDc1BOt53Ep8bHSzVVc0knYe5YoQjiX3QynO5/QPa60Uy4o0mj7T63Uil+d49jUhemLBrc5uUHF4njTENvPDxLcbb+R7Kax0avvxcLf5D1QNpDPG8+UdkUjCg7L6d3iXAROM42fGUK27E/GJpGxyyXAIGd9t1qhPb5brsF8NaB3oNm8DTv5atXtfzyQCljoY2+pA3FUMrG0PcJFv9DymKeBZ5QZpgaarvWQqHeCcSHXYxzRiSNXIDd9zkEWMDgiVYxJ7Zv3BfHQg+lyTz7K/1na5IJDQBGx1DdFqPlpqbxo9lNKcmYJkVQk2kXDIwrra66TAnGlgKORC+YpSxic+HAAdm99OXXwR1HoCJ1vk09Lp5nEj0BRaJ8Qywi28KVSJ6Jtl3btlhwWt0oRPhSWY5vXzNRslIo4Ylmj94NAqYOs2vh0bqbIBN1gUbiaYAIOaa3ykqaK2Yd3+eH5ADkk4VRKM4qQge8ev6ibywlcgYjSHdJRvFn7sTG/ON/gF7kczaBg/mP0cWQjfKXMZh0NzKzkCHDtXQMbGcBsafStNzw7ZlmURt0wQ927R1PYQ9fOC/o85SgLhj4kx25OzNdSJEbG+lv2zCNtgkL5jDo1Fc7zaclCBQpCYNkcPhUnDWSN8wDCQ9vAyWn2gcRaX05mHuXtHOv5HmnRO57NfHQ2q7des X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(376014)(1800799024)(82310400026)(36860700013);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 08 Dec 2024 06:31:03.9670 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: f3736dfb-6d42-4a7a-55a3-08dd1751e3fc X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CY4PEPF0000E9D8.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH7PR12MB8594 For Ryzen systems the EPP policy set by the BIOS is generally configured to performance as this is the default register value for the CPPC request MSR. If a user doesn't use additional software to configure EPP then the system will default biased towards performance and consume extra battery. Instead configure the default to "balanced_performance" for this case. Suggested-by: Artem S. Tashkinov Reviewed-by: Dhananjay Ugwekar Tested-by: Dhananjay Ugwekar Closes: https://bugzilla.kernel.org/show_bug.cgi?id=219526 Reviewed-by: Gautham R. Shenoy Signed-off-by: Mario Limonciello Reviewed-by: Gautham R. Shenoy --- drivers/cpufreq/amd-pstate.c | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-) diff --git a/drivers/cpufreq/amd-pstate.c b/drivers/cpufreq/amd-pstate.c index 5869bcd287e87..a4ededb8d89df 100644 --- a/drivers/cpufreq/amd-pstate.c +++ b/drivers/cpufreq/amd-pstate.c @@ -1501,8 +1501,6 @@ static int amd_pstate_epp_cpu_init(struct cpufreq_policy *policy) policy->driver_data = cpudata; - cpudata->epp_cached = cpudata->epp_default = amd_pstate_get_epp(cpudata); - policy->min = policy->cpuinfo.min_freq; policy->max = policy->cpuinfo.max_freq; @@ -1513,10 +1511,13 @@ static int amd_pstate_epp_cpu_init(struct cpufreq_policy *policy) * the default cpufreq governor is neither powersave nor performance. */ if (amd_pstate_acpi_pm_profile_server() || - amd_pstate_acpi_pm_profile_undefined()) + amd_pstate_acpi_pm_profile_undefined()) { policy->policy = CPUFREQ_POLICY_PERFORMANCE; - else + cpudata->epp_default = amd_pstate_get_epp(cpudata); + } else { policy->policy = CPUFREQ_POLICY_POWERSAVE; + cpudata->epp_default = AMD_CPPC_EPP_BALANCE_PERFORMANCE; + } if (cpu_feature_enabled(X86_FEATURE_CPPC)) { ret = rdmsrl_on_cpu(cpudata->cpu, MSR_AMD_CPPC_REQ, &value); @@ -1529,6 +1530,9 @@ static int amd_pstate_epp_cpu_init(struct cpufreq_policy *policy) return ret; WRITE_ONCE(cpudata->cppc_cap1_cached, value); } + ret = amd_pstate_set_epp(cpudata, cpudata->epp_default); + if (ret) + return ret; current_pstate_driver->adjust_perf = NULL;