From patchwork Mon Feb 17 22:07:04 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mario Limonciello X-Patchwork-Id: 13978729 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A3A0D1DED67; Mon, 17 Feb 2025 22:07:48 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1739830068; cv=none; b=IESjyOONmqT2MFELSNyAZ8A3xF5ax1RAavSpzQb+ah+Zio4ZUyH4rg5SThCdsmigvO8rp69YpDbtTsEZxhN3Lu5e8TQzIyR2V/KZKA1BnBzYXIrnrq0z5eqZ3+7yvbL62JfBPDrPiCY5JKw3k7FPxpKIo3aptW/iKX9rMihGZm8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1739830068; c=relaxed/simple; bh=/KzC6QnSkHJXGzPy7CJR/30bx9FgiwFxum2njUVEEt8=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=T13UCxGaD6SPDb5U1FlygHQWPSUzryze4LTegJHcB7DObFJw5hCnA0xzs6Ylv7JD7Gf937SDa1s3JmS7L/4k9jM/jaS7yKusngKJKEdUV7MapQJwhv6UYDZy4ajmfHEfYkWmJhzTcYl8IsvFTcybQ9PUjoj6LrZ7rEcPpEmB/LA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=LuOg9QE9; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="LuOg9QE9" Received: by smtp.kernel.org (Postfix) with ESMTPSA id C4933C4CEE8; Mon, 17 Feb 2025 22:07:47 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1739830068; bh=/KzC6QnSkHJXGzPy7CJR/30bx9FgiwFxum2njUVEEt8=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=LuOg9QE9FFu7G4yDZhJV5Jfv3/Gl3TZm+YVGr1angAGiCPO6a1ZOiw03ZzzbxYs8M GxveMxJS6b5qXBLQOWXVabmS+6HQk1WF4X/KjUi0XqXx9ehHNexKbW2T3nT+SnVvl6 rFi3wKQW1ZCHM9hj5sgnbPnOThDL5JzNk1RUBA/d9v3bhoRb8UcFtk9tW4bjJG/HJM ehjnyDlXG/uzFRFh448752BaGjZKc4mfDXzPSXd5Bp8kPmbGLt4G4UuRmZgmNK9dCr aenK8uOceyq9KPrGS5iWSmQLVgwI3u2xtEcaRFCLu0buDSfl5cqjEdBeGBqZekIQ5x IGbHrUMAgoJhg== From: Mario Limonciello To: "Gautham R . Shenoy" , Perry Yuan Cc: Dhananjay Ugwekar , linux-kernel@vger.kernel.org (open list:X86 ARCHITECTURE (32-BIT AND 64-BIT)), linux-pm@vger.kernel.org (open list:CPU FREQUENCY SCALING FRAMEWORK), Mario Limonciello , Dhananjay Ugwekar Subject: [PATCH v3 15/18] cpufreq/amd-pstate: Update cppc_req_cached for shared mem EPP writes Date: Mon, 17 Feb 2025 16:07:04 -0600 Message-ID: <20250217220707.1468365-16-superm1@kernel.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250217220707.1468365-1-superm1@kernel.org> References: <20250217220707.1468365-1-superm1@kernel.org> Precedence: bulk X-Mailing-List: linux-pm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Mario Limonciello On EPP only writes update the cached variable so that the min/max performance controls don't need to be updated again. Reviewed-by: Dhananjay Ugwekar Reviewed-by: Gautham R. Shenoy Signed-off-by: Mario Limonciello --- drivers/cpufreq/amd-pstate.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/drivers/cpufreq/amd-pstate.c b/drivers/cpufreq/amd-pstate.c index eb54960f313be..1f4c9d7fe28f5 100644 --- a/drivers/cpufreq/amd-pstate.c +++ b/drivers/cpufreq/amd-pstate.c @@ -336,6 +336,7 @@ static int shmem_set_epp(struct cpufreq_policy *policy, u8 epp) { struct amd_cpudata *cpudata = policy->driver_data; struct cppc_perf_ctrls perf_ctrls; + u64 value; int ret; if (trace_amd_pstate_epp_perf_enabled()) { @@ -362,6 +363,11 @@ static int shmem_set_epp(struct cpufreq_policy *policy, u8 epp) } WRITE_ONCE(cpudata->epp_cached, epp); + value = READ_ONCE(cpudata->cppc_req_cached); + value &= ~AMD_CPPC_EPP_PERF_MASK; + value |= FIELD_PREP(AMD_CPPC_EPP_PERF_MASK, epp); + WRITE_ONCE(cpudata->cppc_req_cached, value); + return ret; }