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[RFC,v2,1/1] x86: msr: add 'msr_pkg_cst_config_control.h' header

Message ID 20250317145430.2153013-2-dedekind1@gmail.com (mailing list archive)
State New
Headers show
Series Add a header for MSR_PKG_CST_CONFIG_CONTROL | expand

Commit Message

Artem Bityutskiy March 17, 2025, 2:54 p.m. UTC 
From: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>

There are now two places where the C1 demotion feature gets
enabled/disabled using the read-modify-write semantics:
1. The Intel PMC framework (cnp.c).
2. The intel_idle.c driver.

Introduce a common helper function enabling/disabling C1 demotion bit of
the MSR_PKG_CST_CONFIG_CONTROL register.

Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
---
 .../include/asm/msr_pkg_cst_config_control.h  | 41 +++++++++++++++++++
 drivers/idle/intel_idle.c                     | 10 +----
 drivers/platform/x86/intel/pmc/cnp.c          |  7 ++--
 3 files changed, 46 insertions(+), 12 deletions(-)
 create mode 100644 arch/x86/include/asm/msr_pkg_cst_config_control.h
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Patch

diff --git a/arch/x86/include/asm/msr_pkg_cst_config_control.h b/arch/x86/include/asm/msr_pkg_cst_config_control.h
new file mode 100644
index 0000000000000..3593e0fe650a7
--- /dev/null
+++ b/arch/x86/include/asm/msr_pkg_cst_config_control.h
@@ -0,0 +1,41 @@ 
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Accessor functions for the MSR_PKG_CST_CONFIG_CONTROL (0xE2) MSR, found on
+ * some Intel processors.
+ */
+
+#ifndef _MSR_PKG_CST_CONFIG_CONTROL_H
+#define _MSR_PKG_CST_CONFIG_CONTROL_H
+
+#include <asm/msr-index.h>
+#include <asm/msr.h>
+
+/**
+ * msr_pkg_cst_config_set_c1_demotion - Enable/disable C1 demotion.
+ * @set: Enable C1 demotion if true, disable it if false.
+ * @other_bits: Additional bits to set or clear in the register.
+ *
+ * Read-modify-write the MSR_PKG_CST_CONFIG_CONTROL register to enable or
+ * disable C1 demotion. The caller should take care of locking if necessary.
+ *
+ * Return: The new value of the MSR_PKG_CST_CONFIG_CONTROL register after
+ * modification.
+ */
+static inline unsigned long long
+msr_pkg_cst_config_set_c1_demotion(bool set, unsigned long long other_bits)
+{
+	unsigned long long val;
+
+	rdmsrl(MSR_PKG_CST_CONFIG_CONTROL, val);
+
+	if (set)
+		val |= NHM_C1_AUTO_DEMOTE | other_bits;
+	else
+		val &= ~(NHM_C1_AUTO_DEMOTE | other_bits);
+
+	wrmsrl(MSR_PKG_CST_CONFIG_CONTROL, val);
+
+	return val;
+}
+
+#endif /* _MSR_PKG_CST_CONFIG_CONTROL_H */
diff --git a/drivers/idle/intel_idle.c b/drivers/idle/intel_idle.c
index da9da7cb27656..0dee44b489064 100644
--- a/drivers/idle/intel_idle.c
+++ b/drivers/idle/intel_idle.c
@@ -60,6 +60,7 @@ 
 #include <asm/spec-ctrl.h>
 #include <asm/tsc.h>
 #include <asm/fpu/api.h>
+#include <asm/msr_pkg_cst_config_control.h>
 
 #define INTEL_IDLE_VERSION "0.5.1"
 
@@ -2325,18 +2326,11 @@  static void __init intel_idle_cpuidle_devices_uninit(void)
 
 static void intel_c1_demotion_toggle(void *enable)
 {
-	unsigned long long msr_val;
-
-	rdmsrl(MSR_PKG_CST_CONFIG_CONTROL, msr_val);
 	/*
 	 * Enable/disable C1 undemotion along with C1 demotion, as this is the
 	 * most sensible configuration in general.
 	 */
-	if (enable)
-		msr_val |= NHM_C1_AUTO_DEMOTE | SNB_C1_AUTO_UNDEMOTE;
-	else
-		msr_val &= ~(NHM_C1_AUTO_DEMOTE | SNB_C1_AUTO_UNDEMOTE);
-	wrmsrl(MSR_PKG_CST_CONFIG_CONTROL, msr_val);
+	msr_pkg_cst_config_set_c1_demotion(!!enable, SNB_C1_AUTO_UNDEMOTE);
 }
 
 static ssize_t intel_c1_demotion_store(struct device *dev,
diff --git a/drivers/platform/x86/intel/pmc/cnp.c b/drivers/platform/x86/intel/pmc/cnp.c
index fc5193fdf8a88..d4e0d02a690ff 100644
--- a/drivers/platform/x86/intel/pmc/cnp.c
+++ b/drivers/platform/x86/intel/pmc/cnp.c
@@ -10,6 +10,7 @@ 
 
 #include <linux/smp.h>
 #include <linux/suspend.h>
+#include <asm/msr_pkg_cst_config_control.h>
 #include "core.h"
 
 /* Cannon Lake: PGD PFET Enable Ack Status Register(s) bitmap */
@@ -227,10 +228,8 @@  static void disable_c1_auto_demote(void *unused)
 	int cpunum = smp_processor_id();
 	u64 val;
 
-	rdmsrl(MSR_PKG_CST_CONFIG_CONTROL, val);
-	per_cpu(pkg_cst_config, cpunum) = val;
-	val &= ~NHM_C1_AUTO_DEMOTE;
-	wrmsrl(MSR_PKG_CST_CONFIG_CONTROL, val);
+	val = msr_pkg_cst_config_set_c1_demotion(false, 0)
+	per_cpu(pkg_cst_config, cpunum) = val
 
 	pr_debug("%s: cpu:%d cst %llx\n", __func__, cpunum, val);
 }