From patchwork Sun Oct 6 15:11:03 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: William Breathitt Gray X-Patchwork-Id: 11176377 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 951F476 for ; Sun, 6 Oct 2019 15:12:31 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 7449B21841 for ; Sun, 6 Oct 2019 15:12:31 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="thGZHSpW" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726742AbfJFPLn (ORCPT ); Sun, 6 Oct 2019 11:11:43 -0400 Received: from mail-yb1-f195.google.com ([209.85.219.195]:39971 "EHLO mail-yb1-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726714AbfJFPLn (ORCPT ); Sun, 6 Oct 2019 11:11:43 -0400 Received: by mail-yb1-f195.google.com with SMTP id s7so208014ybq.7; Sun, 06 Oct 2019 08:11:42 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=o+Nx0iwa/JWg8XzaLOzCUa+40QRks91uKc0Q4Z5/tUQ=; b=thGZHSpW+fcHny3rebGzRMZOeR0rKt7P6Qs5pSmNH4mmMA3V7/8QQvre1oN5TkwgW4 zrTF+tj+WGjJe7MwIaUnCEIW3RIk+AMl3WLy9DgcTRBGCfYSSw8X74V+0TcMXQXCLkli 92Rv+q3p2y6YOMEeRIVStCbDfsTx1krZdjJGJeBm9EjWMooYJBzapNk1GaM65sL/1qjB cy6uaNX7NhgqP3cceEOe9GHifQmqfKWNuDM5wyOP1vc1bS/hLoGhfO2J3O27JTADO5sx obrlGsuxodfX/0WqdtoZAMPXf7UFDEW34nnvymRkDWE0d21VuI1Upadfc68nQurP93K5 GD2g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=o+Nx0iwa/JWg8XzaLOzCUa+40QRks91uKc0Q4Z5/tUQ=; b=dy+TLjGrq6UgHbL1AfnOKr6kHU4TWzJ6KI5huLH5WtD1LacATfQTveuzl73JVdKKVG Ut7R0zE7RuYxeBnQuNcQmkVSJLFLn1wE+M95RWUtHx/zDbbJvthSWOYnRB1eDD+zDb4E 0KtQR4wvBeQJ58qKhpdwv6xpDn3snSSLyDe4iko8zdtV7yGrjKOKI/Kgf+pg/4miP2D/ Og5BhbXUxo5fEwqSVgD9tLd5gyrHon54A4NRbFrQWm/X+smhK74i99QvFVTzFEvahpBK JDkOjEwyFH5Wbb/0niL7/YVFhGEjW8tE17eK3/4ATgjhcEh6N2vSD9L84iD4qKD0PtL4 vUmg== X-Gm-Message-State: APjAAAVcKP82fML/ilw/P/DlkpFRyDzjE2BwFx1pgJFvOOb2gqKgd02V frOH62aIrv1glMOzHYh0tok= X-Google-Smtp-Source: APXvYqxjcvUrJiQlrjKkUTREitpUYE11/fnyNPMvejqcY3QjUeMjf9CgClwYGaJCbn/fFq2dB5zDmw== X-Received: by 2002:a25:2d46:: with SMTP id s6mr3396808ybe.51.1570374701961; Sun, 06 Oct 2019 08:11:41 -0700 (PDT) Received: from localhost.localdomain (072-189-084-142.res.spectrum.com. [72.189.84.142]) by smtp.gmail.com with ESMTPSA id e82sm2662434ywc.43.2019.10.06.08.11.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 06 Oct 2019 08:11:41 -0700 (PDT) From: William Breathitt Gray To: linus.walleij@linaro.org, bgolaszewski@baylibre.com Cc: akpm@linux-foundation.org, linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arch@vger.kernel.org, andriy.shevchenko@linux.intel.com, linux@rasmusvillemoes.dk, yamada.masahiro@socionext.com, linux-arm-kernel@lists.infradead.org, linux-pm@vger.kernel.org, geert@linux-m68k.org, preid@electromag.com.au, lukas@wunner.de, sean.nyekjaer@prevas.dk, morten.tiljeset@prevas.dk, William Breathitt Gray Subject: [PATCH v16 06/14] gpio: ws16c48: Utilize for_each_set_clump8 macro Date: Sun, 6 Oct 2019 11:11:03 -0400 Message-Id: <28e8f099c8a509cf736be924631e472cdaeed5e0.1570374078.git.vilhelm.gray@gmail.com> X-Mailer: git-send-email 2.23.0 In-Reply-To: References: MIME-Version: 1.0 Sender: linux-pm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org Replace verbose implementation in get_multiple/set_multiple callbacks with for_each_set_clump8 macro to simplify code and improve clarity. Reviewed-by: Linus Walleij Signed-off-by: William Breathitt Gray --- drivers/gpio/gpio-ws16c48.c | 73 ++++++++++--------------------------- 1 file changed, 20 insertions(+), 53 deletions(-) diff --git a/drivers/gpio/gpio-ws16c48.c b/drivers/gpio/gpio-ws16c48.c index e0ef66b6a237..51aaa5c17fce 100644 --- a/drivers/gpio/gpio-ws16c48.c +++ b/drivers/gpio/gpio-ws16c48.c @@ -126,42 +126,19 @@ static int ws16c48_gpio_get_multiple(struct gpio_chip *chip, unsigned long *mask, unsigned long *bits) { struct ws16c48_gpio *const ws16c48gpio = gpiochip_get_data(chip); - const unsigned int gpio_reg_size = 8; - size_t i; - const size_t num_ports = chip->ngpio / gpio_reg_size; - unsigned int bits_offset; - size_t word_index; - unsigned int word_offset; - unsigned long word_mask; - const unsigned long port_mask = GENMASK(gpio_reg_size - 1, 0); + unsigned long offset; + unsigned long gpio_mask; + unsigned int port_addr; unsigned long port_state; /* clear bits array to a clean slate */ bitmap_zero(bits, chip->ngpio); - /* get bits are evaluated a gpio port register at a time */ - for (i = 0; i < num_ports; i++) { - /* gpio offset in bits array */ - bits_offset = i * gpio_reg_size; + for_each_set_clump8(offset, gpio_mask, mask, chip->ngpio) { + port_addr = ws16c48gpio->base + offset / 8; + port_state = inb(port_addr) & gpio_mask; - /* word index for bits array */ - word_index = BIT_WORD(bits_offset); - - /* gpio offset within current word of bits array */ - word_offset = bits_offset % BITS_PER_LONG; - - /* mask of get bits for current gpio within current word */ - word_mask = mask[word_index] & (port_mask << word_offset); - if (!word_mask) { - /* no get bits in this port so skip to next one */ - continue; - } - - /* read bits from current gpio port */ - port_state = inb(ws16c48gpio->base + i); - - /* store acquired bits at respective bits array offset */ - bits[word_index] |= (port_state << word_offset) & word_mask; + bitmap_set_value8(bits, port_state, offset); } return 0; @@ -195,39 +172,29 @@ static void ws16c48_gpio_set_multiple(struct gpio_chip *chip, unsigned long *mask, unsigned long *bits) { struct ws16c48_gpio *const ws16c48gpio = gpiochip_get_data(chip); - unsigned int i; - const unsigned int gpio_reg_size = 8; - unsigned int port; - unsigned int iomask; - unsigned int bitmask; + unsigned long offset; + unsigned long gpio_mask; + size_t index; + unsigned int port_addr; + unsigned long bitmask; unsigned long flags; - /* set bits are evaluated a gpio register size at a time */ - for (i = 0; i < chip->ngpio; i += gpio_reg_size) { - /* no more set bits in this mask word; skip to the next word */ - if (!mask[BIT_WORD(i)]) { - i = (BIT_WORD(i) + 1) * BITS_PER_LONG - gpio_reg_size; - continue; - } - - port = i / gpio_reg_size; + for_each_set_clump8(offset, gpio_mask, mask, chip->ngpio) { + index = offset / 8; + port_addr = ws16c48gpio->base + index; /* mask out GPIO configured for input */ - iomask = mask[BIT_WORD(i)] & ~ws16c48gpio->io_state[port]; - bitmask = iomask & bits[BIT_WORD(i)]; + gpio_mask &= ~ws16c48gpio->io_state[index]; + bitmask = bitmap_get_value8(bits, offset) & gpio_mask; raw_spin_lock_irqsave(&ws16c48gpio->lock, flags); /* update output state data and set device gpio register */ - ws16c48gpio->out_state[port] &= ~iomask; - ws16c48gpio->out_state[port] |= bitmask; - outb(ws16c48gpio->out_state[port], ws16c48gpio->base + port); + ws16c48gpio->out_state[index] &= ~gpio_mask; + ws16c48gpio->out_state[index] |= bitmask; + outb(ws16c48gpio->out_state[index], port_addr); raw_spin_unlock_irqrestore(&ws16c48gpio->lock, flags); - - /* prepare for next gpio register set */ - mask[BIT_WORD(i)] >>= gpio_reg_size; - bits[BIT_WORD(i)] >>= gpio_reg_size; } }