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[24/44] x86: intel-family.h: Add GEMINI_LAKE SOC

Message ID 311f77708f362c1af0a999ba5ebbbc062fdc5601.1488345270.git.len.brown@intel.com (mailing list archive)
State Mainlined
Delegated to: Rafael Wysocki
Headers show

Commit Message

Len Brown March 1, 2017, 5:27 a.m. UTC 
From: Len Brown <len.brown@intel.com>

Cc: x86@kernel.org
Signed-off-by: Len Brown <len.brown@intel.com>
---
 arch/x86/include/asm/intel-family.h | 1 +
 1 file changed, 1 insertion(+)

Comments

Andy Shevchenko March 1, 2017, 11:48 p.m. UTC | #1 
On Wed, Mar 1, 2017 at 7:27 AM, Len Brown <lenb@kernel.org> wrote:
> From: Len Brown <len.brown@intel.com>

> --- a/arch/x86/include/asm/intel-family.h
> +++ b/arch/x86/include/asm/intel-family.h
> @@ -59,6 +59,7 @@
>  #define INTEL_FAM6_ATOM_MERRIFIELD     0x4A /* Tangier */
>  #define INTEL_FAM6_ATOM_MOOREFIELD     0x5A /* Anniedale */
>  #define INTEL_FAM6_ATOM_GOLDMONT       0x5C
> +#define INTEL_FAM6_ATOM_GEMINI_LAKE    0x7A
>  #define INTEL_FAM6_ATOM_DENVERTON      0x5F /* Goldmont Microserver */

One nit: can we keep it in order by model ID?
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Patch

diff --git a/arch/x86/include/asm/intel-family.h b/arch/x86/include/asm/intel-family.h
index 8167fdb67ae8..9814db42b790 100644
--- a/arch/x86/include/asm/intel-family.h
+++ b/arch/x86/include/asm/intel-family.h
@@ -59,6 +59,7 @@ 
 #define INTEL_FAM6_ATOM_MERRIFIELD	0x4A /* Tangier */
 #define INTEL_FAM6_ATOM_MOOREFIELD	0x5A /* Anniedale */
 #define INTEL_FAM6_ATOM_GOLDMONT	0x5C
+#define INTEL_FAM6_ATOM_GEMINI_LAKE	0x7A
 #define INTEL_FAM6_ATOM_DENVERTON	0x5F /* Goldmont Microserver */
 
 /* Xeon Phi */