| Message ID | 3548a1e1056d9d08286da8ca1c68da23c6672ee3.1713861200.git.perry.yuan@amd.com (mailing list archive) |
|---|---|
| State | Superseded, archived |
| Headers | show |
| Series | AMD Pstate Driver Core Performance Boost | expand |
On Tue, Apr 23, 2024 at 04:40:57PM +0800, Yuan, Perry wrote: > From: Perry Yuan <Perry.Yuan@amd.com> > > Select the min perf to fix the highest perf value while update pstate > CPPC request MSR register, here we need to limit the max perf value when > CPU boost is disabled in case of that highest perf value in the MSR will be > reset to original highest perf value which cause the BOOST control > failed. > > Signed-off-by: Perry Yuan <Perry.Yuan@amd.com> Acked-by: Huang Rui <ray.huang@amd.com> > --- > drivers/cpufreq/amd-pstate.c | 5 +++++ > 1 file changed, 5 insertions(+) > > diff --git a/drivers/cpufreq/amd-pstate.c b/drivers/cpufreq/amd-pstate.c > index 49eeb38fcf20..22e5b84dbe28 100644 > --- a/drivers/cpufreq/amd-pstate.c > +++ b/drivers/cpufreq/amd-pstate.c > @@ -476,6 +476,7 @@ static void amd_pstate_update(struct amd_cpudata *cpudata, u32 min_perf, > u32 des_perf, u32 max_perf, bool fast_switch, int gov_flags) > { > u64 prev = READ_ONCE(cpudata->cppc_req_cached); > + u32 nominal_perf = READ_ONCE(cpudata->nominal_perf); > u64 value = prev; > > min_perf = clamp_t(unsigned long, min_perf, cpudata->min_limit_perf, > @@ -495,6 +496,10 @@ static void amd_pstate_update(struct amd_cpudata *cpudata, u32 min_perf, > value &= ~AMD_CPPC_DES_PERF(~0L); > value |= AMD_CPPC_DES_PERF(des_perf); > > + /* limit the max perf when core performance boost feature is disabled */ > + if (!amd_pstate_global_params.cpb_boost) > + max_perf = min_t(unsigned long, nominal_perf, max_perf); > + > value &= ~AMD_CPPC_MAX_PERF(~0L); > value |= AMD_CPPC_MAX_PERF(max_perf); > > -- > 2.34.1 >
diff --git a/drivers/cpufreq/amd-pstate.c b/drivers/cpufreq/amd-pstate.c index 49eeb38fcf20..22e5b84dbe28 100644 --- a/drivers/cpufreq/amd-pstate.c +++ b/drivers/cpufreq/amd-pstate.c @@ -476,6 +476,7 @@ static void amd_pstate_update(struct amd_cpudata *cpudata, u32 min_perf, u32 des_perf, u32 max_perf, bool fast_switch, int gov_flags) { u64 prev = READ_ONCE(cpudata->cppc_req_cached); + u32 nominal_perf = READ_ONCE(cpudata->nominal_perf); u64 value = prev; min_perf = clamp_t(unsigned long, min_perf, cpudata->min_limit_perf, @@ -495,6 +496,10 @@ static void amd_pstate_update(struct amd_cpudata *cpudata, u32 min_perf, value &= ~AMD_CPPC_DES_PERF(~0L); value |= AMD_CPPC_DES_PERF(des_perf); + /* limit the max perf when core performance boost feature is disabled */ + if (!amd_pstate_global_params.cpb_boost) + max_perf = min_t(unsigned long, nominal_perf, max_perf); + value &= ~AMD_CPPC_MAX_PERF(~0L); value |= AMD_CPPC_MAX_PERF(max_perf);