From patchwork Tue Oct 31 09:58:41 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chen Yu X-Patchwork-Id: 10033995 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 9D213602B9 for ; Tue, 31 Oct 2017 10:21:20 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 9150028945 for ; Tue, 31 Oct 2017 10:21:20 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 861A628A24; Tue, 31 Oct 2017 10:21:20 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 06B0328945 for ; Tue, 31 Oct 2017 10:21:20 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753691AbdJaKVF (ORCPT ); Tue, 31 Oct 2017 06:21:05 -0400 Received: from mga09.intel.com ([134.134.136.24]:38985 "EHLO mga09.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753624AbdJaJ4B (ORCPT ); Tue, 31 Oct 2017 05:56:01 -0400 Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by orsmga102.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 31 Oct 2017 02:56:00 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.44,323,1505804400"; d="scan'208";a="915775275" Received: from yu-chen.sh.intel.com ([10.239.160.127]) by FMSMGA003.fm.intel.com with ESMTP; 31 Oct 2017 02:55:58 -0700 From: Yu Chen To: x86@kernel.org Cc: Thomas Gleixner , Ingo Molnar , Lukas Wunner , "Rafael J . Wysocki" , Len Brown , linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, Chen Yu , Rui Zhang Subject: [PATCH 2/3][RFC/RFT] x86/mtrr: Add cpu id into the MTRR setting data structure Date: Tue, 31 Oct 2017 17:58:41 +0800 Message-Id: <4a62f5c3474944ed6e85bc59f32da15d765ed6de.1509438899.git.yu.c.chen@intel.com> X-Mailer: git-send-email 2.13.5 In-Reply-To: References: Sender: linux-pm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Chen Yu We record the cpu which has issued the MTRR setting command, then in the mtrr_rendezvous_handler() we can distinguish it from the other cpus. This is used for MTRR synchronization optimization. Cc: Len Brown Cc: Rafael J. Wysocki Cc: Rui Zhang Signed-off-by: Chen Yu --- arch/x86/kernel/cpu/mtrr/main.c | 10 +++++++--- 1 file changed, 7 insertions(+), 3 deletions(-) diff --git a/arch/x86/kernel/cpu/mtrr/main.c b/arch/x86/kernel/cpu/mtrr/main.c index 40d5a8a75212..a4e7e23f3c2e 100644 --- a/arch/x86/kernel/cpu/mtrr/main.c +++ b/arch/x86/kernel/cpu/mtrr/main.c @@ -148,6 +148,7 @@ struct set_mtrr_data { unsigned long smp_size; unsigned int smp_reg; mtrr_type smp_type; + int smp_cpu; }; /** @@ -231,7 +232,8 @@ set_mtrr(unsigned int reg, unsigned long base, unsigned long size, mtrr_type typ struct set_mtrr_data data = { .smp_reg = reg, .smp_base = base, .smp_size = size, - .smp_type = type + .smp_type = type, + .smp_cpu = smp_processor_id() }; stop_machine(mtrr_rendezvous_handler, &data, cpu_online_mask); @@ -243,7 +245,8 @@ static void set_mtrr_cpuslocked(unsigned int reg, unsigned long base, struct set_mtrr_data data = { .smp_reg = reg, .smp_base = base, .smp_size = size, - .smp_type = type + .smp_type = type, + .smp_cpu = smp_processor_id() }; stop_machine_cpuslocked(mtrr_rendezvous_handler, &data, cpu_online_mask); @@ -255,7 +258,8 @@ static void set_mtrr_from_inactive_cpu(unsigned int reg, unsigned long base, struct set_mtrr_data data = { .smp_reg = reg, .smp_base = base, .smp_size = size, - .smp_type = type + .smp_type = type, + .smp_cpu = smp_processor_id() }; stop_machine_from_inactive_cpu(mtrr_rendezvous_handler, &data,