From patchwork Wed Jul 10 23:57:19 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: "H. Peter Anvin" X-Patchwork-Id: 2825952 Return-Path: X-Original-To: patchwork-linux-pm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 58B4E9F7D6 for ; Wed, 10 Jul 2013 23:57:55 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id A63472011F for ; Wed, 10 Jul 2013 23:57:54 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id EF4B72011B for ; Wed, 10 Jul 2013 23:57:53 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754805Ab3GJX5x (ORCPT ); Wed, 10 Jul 2013 19:57:53 -0400 Received: from terminus.zytor.com ([198.137.202.10]:36022 "EHLO mail.zytor.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754741Ab3GJX5w (ORCPT ); Wed, 10 Jul 2013 19:57:52 -0400 Received: from hanvin-mobl6.amr.corp.intel.com ([192.55.54.40]) (authenticated bits=0) by mail.zytor.com (8.14.5/8.14.5) with ESMTP id r6ANvO18013822 (version=TLSv1/SSLv3 cipher=DHE-RSA-CAMELLIA256-SHA bits=256 verify=NO); Wed, 10 Jul 2013 16:57:25 -0700 Message-ID: <51DDF4DF.4000902@zytor.com> Date: Wed, 10 Jul 2013 16:57:19 -0700 From: "H. Peter Anvin" User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:17.0) Gecko/20130625 Thunderbird/17.0.7 MIME-Version: 1.0 To: =?UTF-8?B?Q2hyaXN0aWFuIFPDvG5rZW5iZXJn?= CC: Jonas Heinrich , "len.brown@intel.com" , "pavel@ucw.cz" , "tglx@linutronix.de" , "mingo@redhat.com" , "x86@kernel.org" , "rjw@sisk.pl" , "linux-kernel@vger.kernel.org" , "linux-pm@vger.kernel.org" Subject: Re: [Bisected] 3.7-rc1 can't resume (still present in 3.9) References: <20130218155439.GA902@onny> <20130223131856.GA682@onny> <51293A8B.5060107@zytor.com> <20130320143257.GA473@onny> <20130501170118.GB488@onny> <518151DD.106@zytor.com> <51DDC972.3010005@student.kit.edu> In-Reply-To: <51DDC972.3010005@student.kit.edu> X-Enigmail-Version: 1.5.1 Sender: linux-pm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org X-Spam-Status: No, score=-7.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, T_TVD_MIME_EPI, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP On 07/10/2013 01:52 PM, Christian Sünkenberg wrote: > Hello, > > On 05/01/2013 07:33 PM, H. Peter Anvin wrote: >> On 05/01/2013 10:01 AM, Jonas Heinrich wrote: >>> Hello, I tried the newest kernel, 3.9 today but the bug is still >>> present. Applying the attached patch solves the bug for me. >>> >>> Best regards, Jonas Heinrich >> >> Okay... WTF is going on here? Does pmode_behavior just not get set up >> correctly? Since it seems you can get it to wake up with your patch, >> perhaps we can get read out the value of pmode_behavior and print it... > > indeed, arch/x86/kernel/acpi/sleep.c tries an rdmsr_safe(MSR_EFER, ...) > and sets WAKEUP_BEHAVIOR_RESTORE_EFER bit on success, however, > on 90 nm Pentium M (Family 6, Model 13), reading an invalid MSR > is not guaranteed to trap, see Erratum X4 in "Intel® Pentium® M > Processor on 90 nm Process with 2-MB L2 Cache and Intel® Processor A100 > and A110 on 90 nm process with 512-KB L2 Cache Specification Update". > On Jonas' T43, which has an affected Pentium M without EFER, > rdmsr_safe(MSR_EFER, ...) succeeds and WAKEUP_BEHAVIOR_RESTORE_EFER > gets set, while on resume the corresponding wrmsr traps and thus resume > fails. > > The pre-3.7 code snippet incidentally catched this by not restoring > EFER when it would be restored to all 0s. > That does seem like a reasonable explanation. Does this patch fix the problem? (Comment blatantly ripped off from your email message.) -hpa diff --git a/arch/x86/kernel/acpi/sleep.c b/arch/x86/kernel/acpi/sleep.c index b44577b..927c5ce 100644 --- a/arch/x86/kernel/acpi/sleep.c +++ b/arch/x86/kernel/acpi/sleep.c @@ -48,9 +48,20 @@ int acpi_suspend_lowlevel(void) #ifndef CONFIG_64BIT native_store_gdt((struct desc_ptr *)&header->pmode_gdt); + /* + * We have to check that we can write back the value, and not + * just read it. At least on 90 nm Pentium M (Family 6, Model + * 13), reading an invalid MSR is not guaranteed to trap, see + * Erratum X4 in "Intel Pentium M Processor on 90 nm Process + * with 2-MB L2 Cache and Intel® Processor A100 and A110 on 90 + * nm process with 512-KB L2 Cache Specification Update". + */ if (!rdmsr_safe(MSR_EFER, &header->pmode_efer_low, - &header->pmode_efer_high)) + &header->pmode_efer_high) && + !wrmsr_safe(MSR_EFER, + header->pmode_efer_low, + header->pmode_efer_high)) header->pmode_behavior |= (1 << WAKEUP_BEHAVIOR_RESTORE_EFER); #endif /* !CONFIG_64BIT */