From patchwork Thu Dec 4 11:14:03 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Viresh Kumar X-Patchwork-Id: 5437461 Return-Path: X-Original-To: patchwork-linux-pm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 4AE57BEEA8 for ; Thu, 4 Dec 2014 11:14:19 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 2AE7E20353 for ; Thu, 4 Dec 2014 11:14:18 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 1910B2025A for ; Thu, 4 Dec 2014 11:14:17 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753600AbaLDLOQ (ORCPT ); Thu, 4 Dec 2014 06:14:16 -0500 Received: from mail-pd0-f174.google.com ([209.85.192.174]:34103 "EHLO mail-pd0-f174.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753504AbaLDLOO (ORCPT ); Thu, 4 Dec 2014 06:14:14 -0500 Received: by mail-pd0-f174.google.com with SMTP id w10so17413142pde.19 for ; Thu, 04 Dec 2014 03:14:14 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=Xi5b/iq7zhrQ9qt2j/Edi7DswJnrBdJcHwng8e3Ry/E=; b=mEFUj06Q1M4JnIRTJT/uxTrFfWmy3bmE1E7jhfowNSy5h/tTkRXprNKYqFiWuhZnXa B9bA0UBFblqV2/yRcCmZVkXKbdVDVRynmaTZ3AK/2KOVtOgPY/M29Oqa9JkjKncy9Hck CyIEUxGFqZnArPrK/Us0q6520e5q3Py0nYYQWfEnprrA8N8mndIHb31DqHe8x6fIucMa MTcBRpiIu9bo2Kn5MbXli3xqwSnPrsdhn0c+7URcximG5svQMt399gD3EnoPi49UxZmH SH3uc1O81PQTyEd6T/5jJSyVnGpuYYuKj0aaFVp4XSHu21xDa+ORpm+LV5RbcBXxePHL uluw== X-Gm-Message-State: ALoCoQk1ECNdgswlWQLcou+0lGqxhuzytE/BEo0ma5n8hQVQo9t3fDu/oznjiOND3cDy8O8ufm2H X-Received: by 10.68.225.193 with SMTP id rm1mr24744646pbc.77.1417691654226; Thu, 04 Dec 2014 03:14:14 -0800 (PST) Received: from localhost ([122.166.92.172]) by mx.google.com with ESMTPSA id yp5sm24788213pbb.16.2014.12.04.03.14.12 for (version=TLSv1.2 cipher=RC4-SHA bits=128/128); Thu, 04 Dec 2014 03:14:13 -0800 (PST) From: Viresh Kumar To: Rafael Wysocki , arnd.bergmann@linaro.org, rob.herring@linaro.org, grant.likely@linaro.org, olof@lixom.net Cc: linaro-kernel@lists.linaro.org, linux-pm@vger.kernel.org, nm@ti.com, Sudeep.Holla@arm.com, sboyd@codeaurora.org, devicetree@vger.kernel.org, santosh.shilimkar@oracle.com, mike.turquette@linaro.org, kesavan.abhilash@gmail.com, catalin.marinas@arm.com, ta.omasab@gmail.com, linux-arm-kernel@lists.infradead.org, thomas.petazzoni@free-electrons.com, Viresh Kumar Subject: [RFC] OPP: Redefine bindings to overcome shortcomings Date: Thu, 4 Dec 2014 16:44:03 +0530 Message-Id: <52c403454c3b8fc201abe7ac74cf657638479311.1417691389.git.viresh.kumar@linaro.org> X-Mailer: git-send-email 2.0.3.693.g996b0fd Sender: linux-pm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Hi Rob, et al.. Current OPP (Operating performance point) DT bindings are proven to be insufficient at multiple instances. There had been multiple band-aid approaches to get them fixed (The latest one being: http://www.mail-archive.com/devicetree@vger.kernel.org/msg53398.html). For obvious reasons Rob rejected them and shown the right path forward. And this is the first try to get those with a pen and paper. The shortcomings we are trying to solve here: - Some kind of compatibility string to probe the right cpufreq driver for platforms, when multiple drivers are available. For example: how to choose between cpufreq-dt and arm_big_little drivers. - Getting clock sharing information between CPUs. Single shared clock vs. independent clock per core vs. shared clock per cluster. - Support for turbo modes - Other per OPP settings: transition latencies, disabled status, etc.? The below document should be enough to describe how I am trying to fix these. Please let me know what all I need to fix, surely there would be lots of obstacles. I am prepared to get beaten up :) I accept in advance that naming is extremely bad here, I need some suggestions for sure. Signed-off-by: Viresh Kumar --- Documentation/devicetree/bindings/power/opp.txt | 147 ++++++++++++++++++++++++ 1 file changed, 147 insertions(+) diff --git a/Documentation/devicetree/bindings/power/opp.txt b/Documentation/devicetree/bindings/power/opp.txt index 74499e5..5efd8d4 100644 --- a/Documentation/devicetree/bindings/power/opp.txt +++ b/Documentation/devicetree/bindings/power/opp.txt @@ -4,6 +4,153 @@ SoCs have a standard set of tuples consisting of frequency and voltage pairs that the device will support per voltage domain. These are called Operating Performance Points or OPPs. +This documents defines OPP bindings with its required/optional properties. +OPPs can be defined for any device, this file uses CPU device as an example to +illustrate how to define OPPs. + +linux,operating-points, opp-lists and opps: + +- linux,operating-points: + Container of all OPP nodes. + + Required properties: + - opp nodes (explained below) + + Optional properties: + - compatible: allow OPPs to express their compatibility with devices + + +- opp-list@*: + List of nodes defining performance points. Following belong to the nodes + within the opp-lists. + + Required properties: + - frequency-kHz: Frequency in kHz + - voltage-uV: voltage in micro Volts + + Optional properties: + - turbo-mode: Marks the volt-freq pair as turbo pair. + - status: Marks the node enabled/disabled. + + +- opp@*: + Operating performance point node per device. Multiple devices sharing it can + use its phandle in their 'opp' property. + + Required properties: + - opp-list: phandle to opp-list defined above. + + Optional properties: + - clocks: Tuple of clock providers + - clock-names: Clock names + - opp-supply: phandle to the parent supply/regulator node + - voltage-tolerance: Specify the CPU voltage tolerance in percentage. + - clock-latency: Specify the possible maximum transition latency for clock, + in unit of nanoseconds. + +Example: Multi-cluster system with separate clock lines for clusters. All CPUs + in the clusters share same clock lines. + +/ { + cpus { + #address-cells = <1>; + #size-cells = <0>; + + linux,operating-points { + compatible = "linux,cpufreq-dt"; + + opp-list0: opp-list@0 { + { + frequency-kHz = <1000000>; + voltage-uV = <975000>; + status = "okay"; + }; + { + frequency-kHz = <1100000>; + voltage-uV = <1000000>; + status = "okay"; + }; + { + frequency-kHz = <1200000>; + voltage-uV = <1025000>; + status = "okay"; + turbo-mode; + }; + }; + + opp-list1: opp-list@1 { + { + frequency-kHz = <1300000>; + voltage-uV = <1050000>; + status = "okay"; + }; + { + frequency-kHz = <1400000>; + voltage-uV = <1075000>; + status = "disabled"; + }; + { + frequency-kHz = <1500000>; + voltage-uV = <1100000>; + status = "okay"; + turbo-mode; + }; + }; + + opp0: opp@0 { + clocks = <&clk-controller 0>; + clock-names = "cpu"; + opp-supply = <&cpu-supply0>; + voltage-tolerance = <2>; /* percentage */ + clock-latency = <300000>; + opp-list = <&opp-list0>; + }; + + opp1: opp@1 { + clocks = <&clk-controller 1>; + clock-names = "cpu"; + opp-supply = <&cpu-supply1>; + voltage-tolerance = <2>; /* percentage */ + clock-latency = <400000>; + opp-list = <&opp-list1>; + }; + }; + + cpu@0 { + compatible = "arm,cortex-a7"; + reg = <0>; + next-level-cache = <&L2>; + opps = ; + }; + + cpu@1 { + compatible = "arm,cortex-a7"; + reg = <1>; + next-level-cache = <&L2>; + opps = ; + }; + + cpu@100 { + compatible = "arm,cortex-a15"; + reg = <100>; + next-level-cache = <&L2>; + opps = ; + }; + + cpu@101 { + compatible = "arm,cortex-a15"; + reg = <101>; + next-level-cache = <&L2>; + opps = ; + }; + }; +}; + + + +Deprecated Bindings +------------------- + Properties: - operating-points: An array of 2-tuples items, and each item consists of frequency and voltage like .