From patchwork Wed May 31 05:19:51 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kuppuswamy Sathyanarayanan X-Patchwork-Id: 9755805 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id AF92160360 for ; Wed, 31 May 2017 05:25:26 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id A4CB2262AE for ; Wed, 31 May 2017 05:25:26 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 995CD2848B; Wed, 31 May 2017 05:25:26 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 4B4EA262AE for ; Wed, 31 May 2017 05:25:26 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1750862AbdEaFZK (ORCPT ); Wed, 31 May 2017 01:25:10 -0400 Received: from mga14.intel.com ([192.55.52.115]:29579 "EHLO mga14.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750938AbdEaFXY (ORCPT ); Wed, 31 May 2017 01:23:24 -0400 Received: from orsmga001.jf.intel.com ([10.7.209.18]) by fmsmga103.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 30 May 2017 22:23:22 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.38,422,1491289200"; d="scan'208";a="1136428097" Received: from skuppusw-desk.jf.intel.com ([10.7.198.92]) by orsmga001.jf.intel.com with ESMTP; 30 May 2017 22:23:22 -0700 From: sathyanarayanan.kuppuswamy@linux.intel.com To: gnurou@gmail.com, heikki.krogerus@linux.intel.com, gregkh@linuxfoundation.org, linus.walleij@linaro.org, edubezval@gmail.com, dvhart@infradead.org, rui.zhang@intel.com, lee.jones@linaro.org, andy@infradead.org Cc: linux-gpio@vger.kernel.org, linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-usb@vger.kernel.org, platform-driver-x86@vger.kernel.org, sathyaosid@gmail.com, Kuppuswamy Sathyanarayanan Subject: [PATCH v4 2/9] mfd: intel_soc_pmic_bxtwc: remove thermal second level irqs Date: Tue, 30 May 2017 22:19:51 -0700 Message-Id: <7279f38edc596e55f307be3f06809f3fd5d99bb0.1496206507.git.sathyanarayanan.kuppuswamy@linux.intel.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: References: Sender: linux-pm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Kuppuswamy Sathyanarayanan Since all second level thermal irqs are consumed by the same device(bxt_wcove_thermal), there is no need to expose them as separate interrupts. We can just export only the first level irqs for thermal and let the device(bxt_wcove_thermal) driver handle the second level irqs based on thermal interrupt status register. Also, just using only the first level irq will eliminate the bug involved in requesting only the second level irq and not explicitly enable the first level irq. For more info on this issue please read the details at, https://lkml.org/lkml/2017/2/27/148 Signed-off-by: Kuppuswamy Sathyanarayanan Acked-for-MFD-by: Lee Jones --- drivers/mfd/intel_soc_pmic_bxtwc.c | 32 ++++++++++++-------------------- 1 file changed, 12 insertions(+), 20 deletions(-) Changes since v1: * None Changes since v2: * Rebased on top of latest release. Changes since v3: * Rebased on top of latest release. diff --git a/drivers/mfd/intel_soc_pmic_bxtwc.c b/drivers/mfd/intel_soc_pmic_bxtwc.c index 7cbaf1e..7c1ed27 100644 --- a/drivers/mfd/intel_soc_pmic_bxtwc.c +++ b/drivers/mfd/intel_soc_pmic_bxtwc.c @@ -84,10 +84,7 @@ enum bxtwc_irqs { enum bxtwc_irqs_level2 { /* Level 2 */ - BXTWC_THRM0_IRQ = 0, - BXTWC_THRM1_IRQ, - BXTWC_THRM2_IRQ, - BXTWC_BCU_IRQ, + BXTWC_BCU_IRQ = 0, BXTWC_ADC_IRQ, BXTWC_USBC_IRQ, BXTWC_CHGR0_IRQ, @@ -114,17 +111,14 @@ static const struct regmap_irq bxtwc_regmap_irqs[] = { }; static const struct regmap_irq bxtwc_regmap_irqs_level2[] = { - REGMAP_IRQ_REG(BXTWC_THRM0_IRQ, 0, 0xff), - REGMAP_IRQ_REG(BXTWC_THRM1_IRQ, 1, 0xbf), - REGMAP_IRQ_REG(BXTWC_THRM2_IRQ, 2, 0xff), - REGMAP_IRQ_REG(BXTWC_BCU_IRQ, 3, 0x1f), - REGMAP_IRQ_REG(BXTWC_ADC_IRQ, 4, 0xff), - REGMAP_IRQ_REG(BXTWC_USBC_IRQ, 5, BIT(5)), - REGMAP_IRQ_REG(BXTWC_CHGR0_IRQ, 5, 0x1f), - REGMAP_IRQ_REG(BXTWC_CHGR1_IRQ, 6, 0x1f), - REGMAP_IRQ_REG(BXTWC_GPIO0_IRQ, 7, 0xff), - REGMAP_IRQ_REG(BXTWC_GPIO1_IRQ, 8, 0x3f), - REGMAP_IRQ_REG(BXTWC_CRIT_IRQ, 9, 0x03), + REGMAP_IRQ_REG(BXTWC_BCU_IRQ, 0, 0x1f), + REGMAP_IRQ_REG(BXTWC_ADC_IRQ, 1, 0xff), + REGMAP_IRQ_REG(BXTWC_USBC_IRQ, 2, BIT(5)), + REGMAP_IRQ_REG(BXTWC_CHGR0_IRQ, 2, 0x1f), + REGMAP_IRQ_REG(BXTWC_CHGR1_IRQ, 3, 0x1f), + REGMAP_IRQ_REG(BXTWC_GPIO0_IRQ, 4, 0xff), + REGMAP_IRQ_REG(BXTWC_GPIO1_IRQ, 5, 0x3f), + REGMAP_IRQ_REG(BXTWC_CRIT_IRQ, 6, 0x03), }; static const struct regmap_irq bxtwc_regmap_irqs_tmu[] = { @@ -142,8 +136,8 @@ static struct regmap_irq_chip bxtwc_regmap_irq_chip = { static struct regmap_irq_chip bxtwc_regmap_irq_chip_level2 = { .name = "bxtwc_irq_chip_level2", - .status_base = BXTWC_THRM0IRQ, - .mask_base = BXTWC_MTHRM0IRQ, + .status_base = BXTWC_BCUIRQ, + .mask_base = BXTWC_MBCUIRQ, .irqs = bxtwc_regmap_irqs_level2, .num_irqs = ARRAY_SIZE(bxtwc_regmap_irqs_level2), .num_regs = 10, @@ -177,9 +171,7 @@ static struct resource charger_resources[] = { }; static struct resource thermal_resources[] = { - DEFINE_RES_IRQ(BXTWC_THRM0_IRQ), - DEFINE_RES_IRQ(BXTWC_THRM1_IRQ), - DEFINE_RES_IRQ(BXTWC_THRM2_IRQ), + DEFINE_RES_IRQ(BXTWC_THRM_LVL1_IRQ), }; static struct resource bcu_resources[] = {