diff mbox series

[v3,08/10] x86/cpufeatures: Add feature bits for AMD heterogeneous processor

Message ID 7a2817ce6e8e6a2787bed8285dba8d81423d8414.1718095377.git.perry.yuan@amd.com (mailing list archive)
State Changes Requested
Delegated to: Mario Limonciello
Headers show
Series AMD Pstate Driver Fixes and Improvements | expand

Commit Message

Yuan, Perry June 11, 2024, 8:52 a.m. UTC
CPUID leaf 0x80000026 advertises core types with different efficiency rankings

Bit 30 indicates the heterogeneous core topology feature, if the bit
set, it means not all instances at the current hierarchical level have
the same core topology.

For better utilization of feature words and help to identify core type,
X86_FEATURE_HETERO_CORE_TOPOLOGY is added as a few scattered feature bits.

PDF p274

Link: https://www.amd.com/content/dam/amd/en/documents/processor-tech-docs/programmer-references/24593.pdf
Signed-off-by: Perry Yuan <perry.yuan@amd.com>
---
 arch/x86/include/asm/cpufeatures.h | 1 +
 arch/x86/kernel/cpu/scattered.c    | 1 +
 2 files changed, 2 insertions(+)

Comments

Borislav Petkov June 11, 2024, 10:52 a.m. UTC | #1
On Tue, Jun 11, 2024 at 04:52:24PM +0800, Perry Yuan wrote:
> Subject: Re: [PATCH v3 08/10] x86/cpufeatures: Add feature bits for AMD heterogeneous processor

"... Add a heterogeneous core topology feature bit"

not "feature bits"

> CPUID leaf 0x80000026 advertises core types with different efficiency rankings
> 
> Bit 30 indicates the heterogeneous core topology feature, if the bit
> set, it means not all instances at the current hierarchical level have
> the same core topology.
> 
> For better utilization of feature words and help to identify core type,
> X86_FEATURE_HETERO_CORE_TOPOLOGY is added as a few scattered feature bits.

This sentence is not needed.

> PDF p274
> 
> Link: https://www.amd.com/content/dam/amd/en/documents/processor-tech-docs/programmer-references/24593.pdf

This link will become obsolete, you can say instead

Search the web for "architecture programmer's manual volume 2 system
programming docID #25493" in order to find the official document.
Mario Limonciello June 11, 2024, 2:31 p.m. UTC | #2
On 6/11/2024 05:52, Borislav Petkov wrote:
> On Tue, Jun 11, 2024 at 04:52:24PM +0800, Perry Yuan wrote:
>> Subject: Re: [PATCH v3 08/10] x86/cpufeatures: Add feature bits for AMD heterogeneous processor
> 
> "... Add a heterogeneous core topology feature bit"
> 
> not "feature bits"
> 
>> CPUID leaf 0x80000026 advertises core types with different efficiency rankings
>>
>> Bit 30 indicates the heterogeneous core topology feature, if the bit
>> set, it means not all instances at the current hierarchical level have
>> the same core topology.
>>
>> For better utilization of feature words and help to identify core type,
>> X86_FEATURE_HETERO_CORE_TOPOLOGY is added as a few scattered feature bits.
> 
> This sentence is not needed.
> 
>> PDF p274
>>
>> Link: https://www.amd.com/content/dam/amd/en/documents/processor-tech-docs/programmer-references/24593.pdf
> 
> This link will become obsolete, you can say instead
> 
> Search the web for "architecture programmer's manual volume 2 system
> programming docID #25493" in order to find the official document.
> 

Another option is to upload it a non ephemeral location like a kernel 
Bugzilla and link to that.  I do recall there is a bug already opened 
for this purpose in the past.
Borislav Petkov June 11, 2024, 2:39 p.m. UTC | #3
On Tue, Jun 11, 2024 at 09:31:54AM -0500, Mario Limonciello wrote:
> Another option is to upload it a non ephemeral location like a kernel
> Bugzilla and link to that.  I do recall there is a bug already opened for
> this purpose in the past.

You mean, after what, 30 years of search engine technology they can't do
one simple thing of finding a doc on the web after indexing its new
location each time the corporate website decides to update to the latest
fancy CRM glue?

:-P
Yuan, Perry June 13, 2024, 8:59 a.m. UTC | #4
[AMD Official Use Only - AMD Internal Distribution Only]

Hi Boris,

> -----Original Message-----
> From: Borislav Petkov <bp@alien8.de>
> Sent: Tuesday, June 11, 2024 10:39 PM
> To: Limonciello, Mario <Mario.Limonciello@amd.com>
> Cc: Yuan, Perry <Perry.Yuan@amd.com>; Shenoy, Gautham Ranjal
> <gautham.shenoy@amd.com>; rafael.j.wysocki@intel.com;
> viresh.kumar@linaro.org; Huang, Ray <Ray.Huang@amd.com>; Deucher,
> Alexander <Alexander.Deucher@amd.com>; Huang, Shimmer
> <Shimmer.Huang@amd.com>; Du, Xiaojian <Xiaojian.Du@amd.com>; Meng,
> Li (Jassmine) <Li.Meng@amd.com>; linux-pm@vger.kernel.org; linux-
> kernel@vger.kernel.org
> Subject: Re: [PATCH v3 08/10] x86/cpufeatures: Add feature bits for AMD
> heterogeneous processor
>
> On Tue, Jun 11, 2024 at 09:31:54AM -0500, Mario Limonciello wrote:
> > Another option is to upload it a non ephemeral location like a kernel
> > Bugzilla and link to that.  I do recall there is a bug already opened
> > for this purpose in the past.
>
> You mean, after what, 30 years of search engine technology they can't do
> one simple thing of finding a doc on the web after indexing its new location
> each time the corporate website decides to update to the latest fancy CRM
> glue?
>
> :-P
>
> --
> Regards/Gruss,

Will update the PPR reference like below in V4.

    Link: https://www.amd.com/content/dam/amd/en/documents/processor-tech-docs/programmer-references/56713-B1_3_05.zip
    See the page 119 of PPR for AMD Family 19h Model 61h B1, docID 56713


Thanks for the feedback.

>     Boris.
>
> https://people.kernel.org/tglx/notes-about-netiquette
Borislav Petkov June 13, 2024, 9:35 a.m. UTC | #5
On Thu, Jun 13, 2024 at 08:59:11AM +0000, Yuan, Perry wrote:
>     Link: https://www.amd.com/content/dam/amd/en/documents/processor-tech-docs/programmer-references/56713-B1_3_05.zip

What about "This link will become obsolete" don't you understand?

Do you need me to explain it in greater detail?
diff mbox series

Patch

diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h
index 3c7434329661..39a92338c015 100644
--- a/arch/x86/include/asm/cpufeatures.h
+++ b/arch/x86/include/asm/cpufeatures.h
@@ -470,6 +470,7 @@ 
 #define X86_FEATURE_BHI_CTRL		(21*32+ 2) /* "" BHI_DIS_S HW control available */
 #define X86_FEATURE_CLEAR_BHB_HW	(21*32+ 3) /* "" BHI_DIS_S HW control enabled */
 #define X86_FEATURE_CLEAR_BHB_LOOP_ON_VMEXIT (21*32+ 4) /* "" Clear branch history at vmexit using SW loop */
+#define X86_FEATURE_HETERO_CORE_TOPOLOGY       (21*32+ 5) /* "" Heterogeneous Core Topology */
 
 /*
  * BUG word(s)
diff --git a/arch/x86/kernel/cpu/scattered.c b/arch/x86/kernel/cpu/scattered.c
index af5aa2c754c2..9e237a3daf7e 100644
--- a/arch/x86/kernel/cpu/scattered.c
+++ b/arch/x86/kernel/cpu/scattered.c
@@ -51,6 +51,7 @@  static const struct cpuid_bit cpuid_bits[] = {
 	{ X86_FEATURE_PERFMON_V2,	CPUID_EAX,  0, 0x80000022, 0 },
 	{ X86_FEATURE_AMD_LBR_V2,	CPUID_EAX,  1, 0x80000022, 0 },
 	{ X86_FEATURE_AMD_LBR_PMC_FREEZE,	CPUID_EAX,  2, 0x80000022, 0 },
+	{ X86_FEATURE_HETERO_CORE_TOPOLOGY,	CPUID_EAX,  30, 0x80000026, 0 },
 	{ 0, 0, 0, 0, 0 }
 };