diff mbox series

[6/8] power: reset: at91-reset: add support for sam9x60 SoC

Message ID 7e68a0298b8802edaead1f9c011f9c2e191ecf6a.1547629763.git.nicolas.ferre@microchip.com (mailing list archive)
State Not Applicable, archived
Headers show
Series ARM: at91/dt: update to existing drivers for the sam9x60 SoC | expand

Commit Message

Nicolas Ferre Jan. 16, 2019, 9:57 a.m. UTC
Add support for additional reset causes and the proper compatibility
string for sam9x60 SoC. The restart function is the same as the samx7.

Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
---
 drivers/power/reset/at91-reset.c | 13 +++++++++++++
 1 file changed, 13 insertions(+)

Comments

Sebastian Reichel Jan. 23, 2019, 6:34 p.m. UTC | #1
Hi,

On Wed, Jan 16, 2019 at 10:57:42AM +0100, Nicolas Ferre wrote:
> Add support for additional reset causes and the proper compatibility
> string for sam9x60 SoC. The restart function is the same as the samx7.
> 
> Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
> ---
>  drivers/power/reset/at91-reset.c | 13 +++++++++++++
>  1 file changed, 13 insertions(+)
> 
> diff --git a/drivers/power/reset/at91-reset.c b/drivers/power/reset/at91-reset.c
> index f44a9ffcc2ab..44ca983a49a1 100644
> --- a/drivers/power/reset/at91-reset.c
> +++ b/drivers/power/reset/at91-reset.c
> @@ -44,6 +44,9 @@ enum reset_type {
>  	RESET_TYPE_WATCHDOG	= 2,
>  	RESET_TYPE_SOFTWARE	= 3,
>  	RESET_TYPE_USER		= 4,
> +	RESET_TYPE_CPU_FAIL	= 6,
> +	RESET_TYPE_XTAL_FAIL	= 7,
> +	RESET_TYPE_ULP2		= 8,

what happened to 5? :)

>  };
>  
>  static void __iomem *at91_ramc_base[2], *at91_rstc_base;
> @@ -164,6 +167,15 @@ static void __init at91_reset_status(struct platform_device *pdev)
>  	case RESET_TYPE_USER:
>  		reason = "user reset";
>  		break;
> +	case RESET_TYPE_CPU_FAIL:
> +		reason = "CPU clock failure detection";
> +		break;
> +	case RESET_TYPE_XTAL_FAIL:
> +		reason = "32.768 kHz crystal failure detection";
> +		break;
> +	case RESET_TYPE_ULP2:
> +		reason = "ULP2 reset";
> +		break;
>  	default:
>  		reason = "unknown reset";
>  		break;
> @@ -183,6 +195,7 @@ static const struct of_device_id at91_reset_of_match[] = {
>  	{ .compatible = "atmel,at91sam9g45-rstc", .data = at91sam9g45_restart },
>  	{ .compatible = "atmel,sama5d3-rstc", .data = sama5d3_restart },
>  	{ .compatible = "atmel,samx7-rstc", .data = samx7_restart },
> +	{ .compatible = "microchip,sam9x60-rstc", .data = samx7_restart },
>  	{ /* sentinel */ }
>  };
>  MODULE_DEVICE_TABLE(of, at91_reset_of_match);

Patch looks fine to me. But I will wait a bit with merging, so that
Alexandre or Ludovic have a chance to provide feedback.

-- Sebastian
Nicolas Ferre Jan. 24, 2019, 10:34 a.m. UTC | #2
Hi Sebastian,

On 23/01/2019 at 19:34, Sebastian Reichel wrote:
> Hi,
> 
> On Wed, Jan 16, 2019 at 10:57:42AM +0100, Nicolas Ferre wrote:
>> Add support for additional reset causes and the proper compatibility
>> string for sam9x60 SoC. The restart function is the same as the samx7.
>>
>> Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
>> ---
>>   drivers/power/reset/at91-reset.c | 13 +++++++++++++
>>   1 file changed, 13 insertions(+)
>>
>> diff --git a/drivers/power/reset/at91-reset.c b/drivers/power/reset/at91-reset.c
>> index f44a9ffcc2ab..44ca983a49a1 100644
>> --- a/drivers/power/reset/at91-reset.c
>> +++ b/drivers/power/reset/at91-reset.c
>> @@ -44,6 +44,9 @@ enum reset_type {
>>   	RESET_TYPE_WATCHDOG	= 2,
>>   	RESET_TYPE_SOFTWARE	= 3,
>>   	RESET_TYPE_USER		= 4,
>> +	RESET_TYPE_CPU_FAIL	= 6,
>> +	RESET_TYPE_XTAL_FAIL	= 7,
>> +	RESET_TYPE_ULP2		= 8,
> 
> what happened to 5? :)

That a good question ;-)

It's marked as "Reserved"... which opens up a whole new field of 
speculation :-)

[..]

>>   	{ .compatible = "atmel,samx7-rstc", .data = samx7_restart },
>> +	{ .compatible = "microchip,sam9x60-rstc", .data = samx7_restart },
>>   	{ /* sentinel */ }
>>   };
>>   MODULE_DEVICE_TABLE(of, at91_reset_of_match);
> 
> Patch looks fine to me. But I will wait a bit with merging, so that
> Alexandre or Ludovic have a chance to provide feedback.

What about merging this patch with the whole series through the at91 
then arm-soc trees?

Best regards,
Sebastian Reichel Jan. 24, 2019, 5:11 p.m. UTC | #3
Hi,

On Thu, Jan 24, 2019 at 10:34:50AM +0000, Nicolas.Ferre@microchip.com wrote:
> Hi Sebastian,
> 
> On 23/01/2019 at 19:34, Sebastian Reichel wrote:
> > Hi,
> > 
> > On Wed, Jan 16, 2019 at 10:57:42AM +0100, Nicolas Ferre wrote:
> >> Add support for additional reset causes and the proper compatibility
> >> string for sam9x60 SoC. The restart function is the same as the samx7.
> >>
> >> Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
> >> ---
> >>   drivers/power/reset/at91-reset.c | 13 +++++++++++++
> >>   1 file changed, 13 insertions(+)
> >>
> >> diff --git a/drivers/power/reset/at91-reset.c b/drivers/power/reset/at91-reset.c
> >> index f44a9ffcc2ab..44ca983a49a1 100644
> >> --- a/drivers/power/reset/at91-reset.c
> >> +++ b/drivers/power/reset/at91-reset.c
> >> @@ -44,6 +44,9 @@ enum reset_type {
> >>   	RESET_TYPE_WATCHDOG	= 2,
> >>   	RESET_TYPE_SOFTWARE	= 3,
> >>   	RESET_TYPE_USER		= 4,
> >> +	RESET_TYPE_CPU_FAIL	= 6,
> >> +	RESET_TYPE_XTAL_FAIL	= 7,
> >> +	RESET_TYPE_ULP2		= 8,
> > 
> > what happened to 5? :)
> 
> That a good question ;-)
> 
> It's marked as "Reserved"... which opens up a whole new field of 
> speculation :-)

Ok :)

> [..]
> 
> >>   	{ .compatible = "atmel,samx7-rstc", .data = samx7_restart },
> >> +	{ .compatible = "microchip,sam9x60-rstc", .data = samx7_restart },
> >>   	{ /* sentinel */ }
> >>   };
> >>   MODULE_DEVICE_TABLE(of, at91_reset_of_match);
> > 
> > Patch looks fine to me. But I will wait a bit with merging, so that
> > Alexandre or Ludovic have a chance to provide feedback.
> 
> What about merging this patch with the whole series through the at91 
> then arm-soc trees?

It seems to be possible to merge this standalone, but merging
through at91/arm-soc is also fine with me.

Acked-by: Sebastian Reichel <sebastian.reichel@collabora.com>

-- Sebastian
diff mbox series

Patch

diff --git a/drivers/power/reset/at91-reset.c b/drivers/power/reset/at91-reset.c
index f44a9ffcc2ab..44ca983a49a1 100644
--- a/drivers/power/reset/at91-reset.c
+++ b/drivers/power/reset/at91-reset.c
@@ -44,6 +44,9 @@  enum reset_type {
 	RESET_TYPE_WATCHDOG	= 2,
 	RESET_TYPE_SOFTWARE	= 3,
 	RESET_TYPE_USER		= 4,
+	RESET_TYPE_CPU_FAIL	= 6,
+	RESET_TYPE_XTAL_FAIL	= 7,
+	RESET_TYPE_ULP2		= 8,
 };
 
 static void __iomem *at91_ramc_base[2], *at91_rstc_base;
@@ -164,6 +167,15 @@  static void __init at91_reset_status(struct platform_device *pdev)
 	case RESET_TYPE_USER:
 		reason = "user reset";
 		break;
+	case RESET_TYPE_CPU_FAIL:
+		reason = "CPU clock failure detection";
+		break;
+	case RESET_TYPE_XTAL_FAIL:
+		reason = "32.768 kHz crystal failure detection";
+		break;
+	case RESET_TYPE_ULP2:
+		reason = "ULP2 reset";
+		break;
 	default:
 		reason = "unknown reset";
 		break;
@@ -183,6 +195,7 @@  static const struct of_device_id at91_reset_of_match[] = {
 	{ .compatible = "atmel,at91sam9g45-rstc", .data = at91sam9g45_restart },
 	{ .compatible = "atmel,sama5d3-rstc", .data = sama5d3_restart },
 	{ .compatible = "atmel,samx7-rstc", .data = samx7_restart },
+	{ .compatible = "microchip,sam9x60-rstc", .data = samx7_restart },
 	{ /* sentinel */ }
 };
 MODULE_DEVICE_TABLE(of, at91_reset_of_match);