From patchwork Wed Jan 16 09:57:42 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nicolas Ferre X-Patchwork-Id: 10765617 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 98B6291E for ; Wed, 16 Jan 2019 09:58:41 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 865C62A537 for ; Wed, 16 Jan 2019 09:58:41 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 7A1A62A612; Wed, 16 Jan 2019 09:58:41 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.9 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 1EEF12A537 for ; Wed, 16 Jan 2019 09:58:41 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2404037AbfAPJ6I (ORCPT ); Wed, 16 Jan 2019 04:58:08 -0500 Received: from esa2.microchip.iphmx.com ([68.232.149.84]:46525 "EHLO esa2.microchip.iphmx.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2404027AbfAPJ6H (ORCPT ); Wed, 16 Jan 2019 04:58:07 -0500 X-IronPort-AV: E=Sophos;i="5.56,485,1539673200"; d="scan'208";a="25386569" Received: from smtpout.microchip.com (HELO email.microchip.com) ([198.175.253.82]) by esa2.microchip.iphmx.com with ESMTP/TLS/DHE-RSA-AES256-SHA; 16 Jan 2019 02:58:06 -0700 Received: from tenerife.corp.atmel.com (10.10.76.4) by chn-sv-exch02.mchp-main.com (10.10.76.38) with Microsoft SMTP Server id 14.3.352.0; Wed, 16 Jan 2019 02:58:05 -0700 From: Nicolas Ferre To: Alexandre Belloni , Ludovic Desroches CC: , , Sebastian Reichel , , , "David S . Miller" , , Alan Stern , "Greg Kroah-Hartman" , Rob Herring , , Nicolas Ferre Subject: [PATCH 6/8] power: reset: at91-reset: add support for sam9x60 SoC Date: Wed, 16 Jan 2019 10:57:42 +0100 Message-ID: <7e68a0298b8802edaead1f9c011f9c2e191ecf6a.1547629763.git.nicolas.ferre@microchip.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: References: MIME-Version: 1.0 Sender: linux-pm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add support for additional reset causes and the proper compatibility string for sam9x60 SoC. The restart function is the same as the samx7. Signed-off-by: Nicolas Ferre Acked-by: Sebastian Reichel --- drivers/power/reset/at91-reset.c | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/drivers/power/reset/at91-reset.c b/drivers/power/reset/at91-reset.c index f44a9ffcc2ab..44ca983a49a1 100644 --- a/drivers/power/reset/at91-reset.c +++ b/drivers/power/reset/at91-reset.c @@ -44,6 +44,9 @@ enum reset_type { RESET_TYPE_WATCHDOG = 2, RESET_TYPE_SOFTWARE = 3, RESET_TYPE_USER = 4, + RESET_TYPE_CPU_FAIL = 6, + RESET_TYPE_XTAL_FAIL = 7, + RESET_TYPE_ULP2 = 8, }; static void __iomem *at91_ramc_base[2], *at91_rstc_base; @@ -164,6 +167,15 @@ static void __init at91_reset_status(struct platform_device *pdev) case RESET_TYPE_USER: reason = "user reset"; break; + case RESET_TYPE_CPU_FAIL: + reason = "CPU clock failure detection"; + break; + case RESET_TYPE_XTAL_FAIL: + reason = "32.768 kHz crystal failure detection"; + break; + case RESET_TYPE_ULP2: + reason = "ULP2 reset"; + break; default: reason = "unknown reset"; break; @@ -183,6 +195,7 @@ static const struct of_device_id at91_reset_of_match[] = { { .compatible = "atmel,at91sam9g45-rstc", .data = at91sam9g45_restart }, { .compatible = "atmel,sama5d3-rstc", .data = sama5d3_restart }, { .compatible = "atmel,samx7-rstc", .data = samx7_restart }, + { .compatible = "microchip,sam9x60-rstc", .data = samx7_restart }, { /* sentinel */ } }; MODULE_DEVICE_TABLE(of, at91_reset_of_match);