From patchwork Wed May 31 22:37:12 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kuppuswamy Sathyanarayanan X-Patchwork-Id: 9758395 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id CE7AE602BF for ; Wed, 31 May 2017 22:44:14 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id C122F28453 for ; Wed, 31 May 2017 22:44:14 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id B5F63284D2; Wed, 31 May 2017 22:44:14 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 702DA28453 for ; Wed, 31 May 2017 22:44:14 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751526AbdEaWoA (ORCPT ); Wed, 31 May 2017 18:44:00 -0400 Received: from mga02.intel.com ([134.134.136.20]:38678 "EHLO mga02.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751266AbdEaWkq (ORCPT ); Wed, 31 May 2017 18:40:46 -0400 Received: from orsmga003.jf.intel.com ([10.7.209.27]) by orsmga101.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 31 May 2017 15:40:42 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.39,276,1493708400"; d="scan'208";a="975304316" Received: from skuppusw-desk.jf.intel.com ([10.7.198.92]) by orsmga003.jf.intel.com with ESMTP; 31 May 2017 15:40:42 -0700 From: sathyanarayanan.kuppuswamy@linux.intel.com To: gnurou@gmail.com, heikki.krogerus@linux.intel.com, gregkh@linuxfoundation.org, linus.walleij@linaro.org, edubezval@gmail.com, dvhart@infradead.org, rui.zhang@intel.com, lee.jones@linaro.org, andy@infradead.org Cc: linux-gpio@vger.kernel.org, linux-pm@vger.kernel.org, linux-usb@vger.kernel.org, linux-kernel@vger.kernel.org, platform-driver-x86@vger.kernel.org, sathyaosid@gmail.com, Kuppuswamy Sathyanarayanan Subject: [PATCH v5 4/8] mfd: intel_soc_pmic_bxtwc: Remove second level irq for gpio device Date: Wed, 31 May 2017 15:37:12 -0700 Message-Id: <93739c1b5890fc18cd842647dcc4996b42a7c263.1496266871.git.sathyanarayanan.kuppuswamy@linux.intel.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <20170531070225.bymdhhpclidwwtpt@dell> References: <20170531070225.bymdhhpclidwwtpt@dell> In-Reply-To: References: Sender: linux-pm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Kuppuswamy Sathyanarayanan Currently all PMIC GPIO domain irqs are consumed by the same device(bxt_wcove_gpio), so there is no need to export them as separate interrupts. We can just export only the first level GPIO irq(BXTWC_GPIO_LVL1_IRQ) as an irq resource and let the GPIO device driver(bxt_wcove_gpio) handle the GPIO sub domain irqs based on status value of GPIO level2 interrupt status register. Also, just using only the first level irq will eliminate the bug involved in requesting only the second level irq and not explicitly enable the first level irq. For more info on this issue please read the details at, https://lkml.org/lkml/2017/2/27/148 Signed-off-by: Kuppuswamy Sathyanarayanan Acked-for-MFD-by: Lee Jones --- drivers/mfd/intel_soc_pmic_bxtwc.c | 7 +------ 1 file changed, 1 insertion(+), 6 deletions(-) Changes since v1: * None Changes since v2: * Rebased on top of latest release. Changes since v3: * None diff --git a/drivers/mfd/intel_soc_pmic_bxtwc.c b/drivers/mfd/intel_soc_pmic_bxtwc.c index 7c1ed27..af11c43 100644 --- a/drivers/mfd/intel_soc_pmic_bxtwc.c +++ b/drivers/mfd/intel_soc_pmic_bxtwc.c @@ -89,8 +89,6 @@ enum bxtwc_irqs_level2 { BXTWC_USBC_IRQ, BXTWC_CHGR0_IRQ, BXTWC_CHGR1_IRQ, - BXTWC_GPIO0_IRQ, - BXTWC_GPIO1_IRQ, BXTWC_CRIT_IRQ, }; @@ -116,8 +114,6 @@ static const struct regmap_irq bxtwc_regmap_irqs_level2[] = { REGMAP_IRQ_REG(BXTWC_USBC_IRQ, 2, BIT(5)), REGMAP_IRQ_REG(BXTWC_CHGR0_IRQ, 2, 0x1f), REGMAP_IRQ_REG(BXTWC_CHGR1_IRQ, 3, 0x1f), - REGMAP_IRQ_REG(BXTWC_GPIO0_IRQ, 4, 0xff), - REGMAP_IRQ_REG(BXTWC_GPIO1_IRQ, 5, 0x3f), REGMAP_IRQ_REG(BXTWC_CRIT_IRQ, 6, 0x03), }; @@ -153,8 +149,7 @@ static struct regmap_irq_chip bxtwc_regmap_irq_chip_tmu = { }; static struct resource gpio_resources[] = { - DEFINE_RES_IRQ_NAMED(BXTWC_GPIO0_IRQ, "GPIO0"), - DEFINE_RES_IRQ_NAMED(BXTWC_GPIO1_IRQ, "GPIO1"), + DEFINE_RES_IRQ_NAMED(BXTWC_GPIO_LVL1_IRQ, "GPIO"), }; static struct resource adc_resources[] = {