| Message ID | 94ad4bca2d8e44a5e53082959220a184c0222e1e.1715356532.git.perry.yuan@amd.com (mailing list archive) |
|---|---|
| State | Needs ACK |
| Headers | show |
| Series | AMD Pstate Driver Fixes and Improvements | expand |
Hi Perry, kernel test robot noticed the following build warnings: [auto build test WARNING on rafael-pm/linux-next] [also build test WARNING on rafael-pm/bleeding-edge next-20240513] [cannot apply to tip/x86/core linus/master v6.9] [If your patch is applied to the wrong git tree, kindly drop us a note. And when submitting patch, we suggest to use '--base' as documented in https://git-scm.com/docs/git-format-patch#_base_tree_information] url: https://github.com/intel-lab-lkp/linux/commits/Perry-Yuan/cpufreq-amd-pstate-optimize-the-initial-frequency-values-verification/20240513-101217 base: https://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm.git linux-next patch link: https://lore.kernel.org/r/94ad4bca2d8e44a5e53082959220a184c0222e1e.1715356532.git.perry.yuan%40amd.com patch subject: [PATCH v2 04/10] cpufreq: amd-pstate: add debug message while CPPC is supported and disabled by SBIOS config: i386-randconfig-013-20240513 (https://download.01.org/0day-ci/archive/20240514/202405140103.onvXHkqE-lkp@intel.com/config) compiler: clang version 18.1.5 (https://github.com/llvm/llvm-project 617a15a9eac96088ae5e9134248d8236e34b91b1) reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20240514/202405140103.onvXHkqE-lkp@intel.com/reproduce) If you fix the issue in a separate patch/commit (i.e. not just a new version of the same patch/commit), kindly add following tags | Reported-by: kernel test robot <lkp@intel.com> | Closes: https://lore.kernel.org/oe-kbuild-all/202405140103.onvXHkqE-lkp@intel.com/ All warnings (new ones prefixed by >>): >> drivers/cpufreq/amd-pstate.c:1727:26: warning: overlapping comparisons always evaluate to false [-Wtautological-overlap-compare] 1727 | (c->x86_model > 0x1f && c->x86_model < 0x1f)) { | ~~~~~~~~~~~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~ 1 warning generated. vim +1727 drivers/cpufreq/amd-pstate.c 1703 1704 /** 1705 * CPPC function is not supported for family ID 17H with model_ID ranging from 0x10 to 0x2F. 1706 * show the debug message that helps to check if the CPU has CPPC support for loading issue. 1707 */ 1708 static bool amd_cppc_supported(void) 1709 { 1710 struct cpuinfo_x86 *c = &cpu_data(0); 1711 1712 if ((boot_cpu_data.x86 == 0x17) && (boot_cpu_data.x86_model < 0x30)) { 1713 pr_debug_once("CPPC feature is not supported by the processor\n"); 1714 return false; 1715 } 1716 1717 /* 1718 * If the CPPC flag is disabled in the BIOS for processors that support MSR-based CPPC 1719 * the AMD Pstate driver may not function correctly. 1720 */ 1721 if (!cpu_feature_enabled(X86_FEATURE_CPPC)) { 1722 if (cpu_feature_enabled(X86_FEATURE_ZEN1) || cpu_feature_enabled(X86_FEATURE_ZEN2)) { 1723 if (c->x86_model > 0x60 && c->x86_model < 0xaf) 1724 goto warn; 1725 } else if (cpu_feature_enabled(X86_FEATURE_ZEN3) || cpu_feature_enabled(X86_FEATURE_ZEN4)) { 1726 if ((c->x86_model > 0x00 && c->x86_model < 0x0F) || (c->x86_model > 0x2f && c->x86_model < 0xaf) || > 1727 (c->x86_model > 0x1f && c->x86_model < 0x1f)) { 1728 goto warn; 1729 } 1730 } else { 1731 goto warn; 1732 } 1733 } 1734 1735 return true; 1736 1737 warn: 1738 pr_debug_once("The CPPC feature is supported but currently disabled by the BIOS.\n" 1739 "Please enable it if your BIOS supports the CPPC option.\n"); 1740 return false; 1741 } 1742
diff --git a/drivers/cpufreq/amd-pstate.c b/drivers/cpufreq/amd-pstate.c index 3109b46fb02e..8b624c79c287 100644 --- a/drivers/cpufreq/amd-pstate.c +++ b/drivers/cpufreq/amd-pstate.c @@ -1707,12 +1707,37 @@ static int __init amd_pstate_set_driver(int mode_idx) */ static bool amd_cppc_supported(void) { + struct cpuinfo_x86 *c = &cpu_data(0); + if ((boot_cpu_data.x86 == 0x17) && (boot_cpu_data.x86_model < 0x30)) { pr_debug_once("CPPC feature is not supported by the processor\n"); return false; } + /* + * If the CPPC flag is disabled in the BIOS for processors that support MSR-based CPPC + * the AMD Pstate driver may not function correctly. + */ + if (!cpu_feature_enabled(X86_FEATURE_CPPC)) { + if (cpu_feature_enabled(X86_FEATURE_ZEN1) || cpu_feature_enabled(X86_FEATURE_ZEN2)) { + if (c->x86_model > 0x60 && c->x86_model < 0xaf) + goto warn; + } else if (cpu_feature_enabled(X86_FEATURE_ZEN3) || cpu_feature_enabled(X86_FEATURE_ZEN4)) { + if ((c->x86_model > 0x00 && c->x86_model < 0x0F) || (c->x86_model > 0x2f && c->x86_model < 0xaf) || + (c->x86_model > 0x1f && c->x86_model < 0x1f)) { + goto warn; + } + } else { + goto warn; + } + } + return true; + +warn: + pr_debug_once("The CPPC feature is supported but currently disabled by the BIOS.\n" + "Please enable it if your BIOS supports the CPPC option.\n"); + return false; } static int __init amd_pstate_init(void)
If CPPC feature is supported by the CPU however the CPUID flag bit is not set by SBIOS, the `amd_pstate` will be failed to load while system booting. So adding one more debug message to inform user to check the SBIOS setting, The change also can help maintainers to debug why amd_pstate driver failed to be loaded at system booting if the processor support CPPC. Closes: https://bugzilla.kernel.org/show_bug.cgi?id=218686 Signed-off-by: Perry Yuan <perry.yuan@amd.com> --- drivers/cpufreq/amd-pstate.c | 25 +++++++++++++++++++++++++ 1 file changed, 25 insertions(+)