From patchwork Thu Jul 14 04:53:24 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Len Brown X-Patchwork-Id: 974322 Received: from smtp1.linux-foundation.org (smtp1.linux-foundation.org [140.211.169.13]) by demeter2.kernel.org (8.14.4/8.14.4) with ESMTP id p6E4vF54009712 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=FAIL) for ; Thu, 14 Jul 2011 04:57:40 GMT Received: from daredevil.linux-foundation.org (localhost [127.0.0.1]) by smtp1.linux-foundation.org (8.14.2/8.13.5/Debian-3ubuntu1.1) with ESMTP id p6E4sGZx012238; Wed, 13 Jul 2011 21:54:45 -0700 Received: from vms173013pub.verizon.net (vms173013pub.verizon.net [206.46.173.13]) by smtp1.linux-foundation.org (8.14.2/8.13.5/Debian-3ubuntu1.1) with ESMTP id p6E4rjvi012182 for ; Wed, 13 Jul 2011 21:53:47 -0700 Received: from localhost.localdomain ([unknown] [69.161.71.61]) by vms173013.mailsrvcs.net (Sun Java(tm) System Messaging Server 7u2-7.02 32bit (built Apr 16 2009)) with ESMTPA id <0LOB002OS493BBE2@vms173013.mailsrvcs.net> for linux-pm@lists.linux-foundation.org; Wed, 13 Jul 2011 23:53:28 -0500 (CDT) Received: from localhost.localdomain (x980 [127.0.0.1]) by localhost.localdomain (8.14.4/8.14.4) with ESMTP id p6E4rQQe006291; Thu, 14 Jul 2011 00:53:26 -0400 Received: from localhost (lenb@localhost) by localhost.localdomain (8.14.4/8.14.4/Submit) with ESMTP id p6E4rOxx006286; Thu, 14 Jul 2011 00:53:24 -0400 X-Authentication-warning: localhost.localdomain: lenb owned process doing -bs Date: Thu, 14 Jul 2011 00:53:24 -0400 (EDT) From: Len Brown X-X-Sender: lenb@x980 To: "H. Peter Anvin" In-reply-to: <4E1E106E.4060408@zytor.com> Message-id: References: <20110414090854.GB9248@elte.hu> <20110415101712.GB28007@elte.hu> <4E1E106E.4060408@zytor.com> User-Agent: Alpine 2.02 (LFD 1266 2009-07-14) MIME-version: 1.0 Received-SPF: pass (localhost is always allowed.) X-Spam-Status: No, hits=-2.701 required=5 tests=AWL, BAYES_00, OSDL_HEADER_SUBJECT_BRACKETED, OSDL_TARGET X-Spam-Checker-Version: SpamAssassin 3.2.4-osdl_revision__1.47__ X-MIMEDefang-Filter: lf$Revision: 1.188 $ X-Scanned-By: MIMEDefang 2.63 on 140.211.169.21 Cc: Andrew Morton , x86@kernel.org, linux-kernel@vger.kernel.org, Thomas Gleixner , Ingo Molnar , Linus Torvalds , linux-pm@lists.linux-foundation.org, Alan Cox , Arjan van de Ven Subject: [linux-pm] [PATCH v2] x86 intel power: Initialize MSR_IA32_ENERGY_PERF_BIAS X-BeenThere: linux-pm@lists.linux-foundation.org X-Mailman-Version: 2.1.9 Precedence: list List-Id: Linux power management List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: linux-pm-bounces@lists.linux-foundation.org Errors-To: linux-pm-bounces@lists.linux-foundation.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.6 (demeter2.kernel.org [140.211.167.43]); Thu, 14 Jul 2011 04:57:40 +0000 (UTC) From: Len Brown Since 2.6.36 (23016bf0d25), Linux prints the existence of "epb" in /proc/cpuinfo, Since 2.6.38 (d5532ee7b40), the x86_energy_perf_policy(8) utility has been available in-tree to update MSR_IA32_ENERGY_PERF_BIAS. However, the typical BIOS fails to initialize the MSR, presumably because this is handled by high-volume shrink-wrap operating systems... Linux distros, on the other hand, do not yet invoke x86_energy_perf_policy(8). As a result, WSM-EP, SNB, and later hardware from Intel will run in its default hardware power-on state (performance), which assumes that users care for performance at all costs and not for energy efficiency. While that is fine for performance benchmarks, the hardware's intended default operating point is "normal" mode... Initialize the MSR to the "normal" by default during kernel boot. x86_energy_perf_policy(8) is available to change the default after boot, should the user have a different preference. cc: stable@kernel.org Signed-off-by: Len Brown Acked-by: Rafael J. Wysocki --- arch/x86/include/asm/msr-index.h | 3 +++ arch/x86/kernel/cpu/intel.c | 18 ++++++++++++++++++ 2 files changed, 21 insertions(+), 0 deletions(-) diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h index 43a18c7..91fedd9 100644 --- a/arch/x86/include/asm/msr-index.h +++ b/arch/x86/include/asm/msr-index.h @@ -250,6 +250,9 @@ #define MSR_IA32_TEMPERATURE_TARGET 0x000001a2 #define MSR_IA32_ENERGY_PERF_BIAS 0x000001b0 +#define ENERGY_PERF_BIAS_PERFORMANCE 0 +#define ENERGY_PERF_BIAS_NORMAL 6 +#define ENERGY_PERF_BIAS_POWERSWAVE 15 #define MSR_IA32_PACKAGE_THERM_STATUS 0x000001b1 diff --git a/arch/x86/kernel/cpu/intel.c b/arch/x86/kernel/cpu/intel.c index d16c2c5..7c1ca07 100644 --- a/arch/x86/kernel/cpu/intel.c +++ b/arch/x86/kernel/cpu/intel.c @@ -448,6 +448,24 @@ static void __cpuinit init_intel(struct cpuinfo_x86 *c) if (cpu_has(c, X86_FEATURE_VMX)) detect_vmx_virtcap(c); + + /* + * Initialize MSR_IA32_ENERGY_PERF_BIAS if BIOS did not. + * x86_energy_perf_policy(8) is available to change it at run-time + */ + if (cpu_has(c, X86_FEATURE_EPB)) { + u64 epb; + + rdmsrl(MSR_IA32_ENERGY_PERF_BIAS, epb); + if ((epb & 0xF) == 0) { + printk_once(KERN_WARNING, "x86: updated energy_perf_bias" + " to 'normal' from 'performance'\n" + "You can view and update epb via utility," + " such as x86_energy_perf_policy(8)\n"); + epb = (epb & ~0xF) | ENERGY_PERF_BIAS_NORMAL; + wrmsrl(MSR_IA32_ENERGY_PERF_BIAS, epb); + } + } } #ifdef CONFIG_X86_32