From patchwork Fri Apr 14 23:25:56 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kuppuswamy Sathyanarayanan X-Patchwork-Id: 9681917 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id E65B160132 for ; Fri, 14 Apr 2017 23:29:44 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id D879D28620 for ; Fri, 14 Apr 2017 23:29:44 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id CD18D286BA; Fri, 14 Apr 2017 23:29:44 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 732DE28620 for ; Fri, 14 Apr 2017 23:29:44 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755891AbdDNX3m (ORCPT ); Fri, 14 Apr 2017 19:29:42 -0400 Received: from mga09.intel.com ([134.134.136.24]:25760 "EHLO mga09.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755835AbdDNX3k (ORCPT ); Fri, 14 Apr 2017 19:29:40 -0400 Received: from orsmga004.jf.intel.com ([10.7.209.38]) by orsmga102.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 14 Apr 2017 16:29:36 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.37,201,1488873600"; d="scan'208";a="77392074" Received: from skuppusw-desk.jf.intel.com ([10.7.198.92]) by orsmga004.jf.intel.com with ESMTP; 14 Apr 2017 16:29:36 -0700 From: sathyanarayanan.kuppuswamy@linux.intel.com To: gnurou@gmail.com, linus.walleij@linaro.org, edubezval@gmail.com, dvhart@infradead.org, rui.zhang@intel.com, lee.jones@linaro.org, andy@infradead.org Cc: linux-gpio@vger.kernel.org, linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, platform-driver-x86@vger.kernel.org, sathyaosid@gmail.com, Kuppuswamy Sathyanarayanan Subject: [PATCH v2 4/8] mfd: intel_soc_pmic_bxtwc: remove second level irq for gpio device Date: Fri, 14 Apr 2017 16:25:56 -0700 Message-Id: X-Mailer: git-send-email 2.7.4 In-Reply-To: <0e4d82ca9cdc41c9d2a8b45258cd72659b4c2063.1492210847.git.sathyanarayanan.kuppuswamy@linux.intel.com> References: <0e4d82ca9cdc41c9d2a8b45258cd72659b4c2063.1492210847.git.sathyanarayanan.kuppuswamy@linux.intel.com> Sender: linux-pm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Kuppuswamy Sathyanarayanan Currently all PMIC GPIO domain irqs are consumed by the same device(bxt_wcove_gpio), so there is no need to export them as separate interrupts. We can just export only the first level GPIO irq(BXTWC_GPIO_LVL1_IRQ) as an irq resource and let the GPIO device driver(bxt_wcove_gpio) handle the GPIO sub domain irqs based on status value of GPIO level2 interrupt status register. Also, just using only the first level irq will eliminate the bug involved in requesting only the second level irq and not explicitly enable the first level irq. For more info on this issue please read the details at, https://lkml.org/lkml/2017/2/27/148 Signed-off-by: Kuppuswamy Sathyanarayanan Acked-for-MFD-by: Lee Jones --- drivers/mfd/intel_soc_pmic_bxtwc.c | 7 +------ 1 file changed, 1 insertion(+), 6 deletions(-) Changes since v1: * None diff --git a/drivers/mfd/intel_soc_pmic_bxtwc.c b/drivers/mfd/intel_soc_pmic_bxtwc.c index c08d514..dc8af1d 100644 --- a/drivers/mfd/intel_soc_pmic_bxtwc.c +++ b/drivers/mfd/intel_soc_pmic_bxtwc.c @@ -88,8 +88,6 @@ enum bxtwc_irqs_level2 { BXTWC_USBC_IRQ, BXTWC_CHGR0_IRQ, BXTWC_CHGR1_IRQ, - BXTWC_GPIO0_IRQ, - BXTWC_GPIO1_IRQ, BXTWC_CRIT_IRQ, }; @@ -115,8 +113,6 @@ static const struct regmap_irq bxtwc_regmap_irqs_level2[] = { REGMAP_IRQ_REG(BXTWC_USBC_IRQ, 2, BIT(5)), REGMAP_IRQ_REG(BXTWC_CHGR0_IRQ, 2, 0x1f), REGMAP_IRQ_REG(BXTWC_CHGR1_IRQ, 3, 0x1f), - REGMAP_IRQ_REG(BXTWC_GPIO0_IRQ, 4, 0xff), - REGMAP_IRQ_REG(BXTWC_GPIO1_IRQ, 5, 0x3f), REGMAP_IRQ_REG(BXTWC_CRIT_IRQ, 6, 0x03), }; @@ -152,8 +148,7 @@ static struct regmap_irq_chip bxtwc_regmap_irq_chip_tmu = { }; static struct resource gpio_resources[] = { - DEFINE_RES_IRQ_NAMED(BXTWC_GPIO0_IRQ, "GPIO0"), - DEFINE_RES_IRQ_NAMED(BXTWC_GPIO1_IRQ, "GPIO1"), + DEFINE_RES_IRQ_NAMED(BXTWC_GPIO_LVL1_IRQ, "GPIO"), }; static struct resource adc_resources[] = {