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Wysocki" , Len Brown , Viresh Kumar , Robert Moore , Erik Schmauss , "Ghannam, Yazen" , "Natarajan, Janakarajan" Subject: [PATCH v2 5/7] acpi/cppc: Add macros to define a R/W sysfs entry for CPPC registers Thread-Topic: [PATCH v2 5/7] acpi/cppc: Add macros to define a R/W sysfs entry for CPPC registers Thread-Index: AQHU6yz79kHizkaTb0yix5NLjnzz5A== Date: Thu, 4 Apr 2019 21:25:53 +0000 Message-ID: References: In-Reply-To: Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-clientproxiedby: SN4PR0201CA0052.namprd02.prod.outlook.com (2603:10b6:803:20::14) To SN6PR12MB2736.namprd12.prod.outlook.com (2603:10b6:805:77::27) authentication-results: spf=none (sender IP is ) smtp.mailfrom=Janakarajan.Natarajan@amd.com; x-ms-exchange-messagesentrepresentingtype: 1 x-mailer: git-send-email 2.17.1 x-originating-ip: [165.204.78.2] x-ms-publictraffictype: Email x-ms-office365-filtering-correlation-id: 1d7e4330-6b65-48cf-fbdc-08d6b9441e41 x-ms-office365-filtering-ht: Tenant x-microsoft-antispam: BCL:0;PCL:0;RULEID:(2390118)(7020095)(4652040)(8989299)(5600139)(711020)(4605104)(4618075)(4534185)(4627221)(201703031133081)(201702281549075)(8990200)(2017052603328)(7193020);SRVR:SN6PR12MB2784; x-ms-traffictypediagnostic: SN6PR12MB2784: x-microsoft-antispam-prvs: x-forefront-prvs: 0997523C40 x-forefront-antispam-report: SFV:NSPM;SFS:(10009020)(39860400002)(346002)(366004)(396003)(136003)(376002)(199004)(189003)(97736004)(6436002)(478600001)(71200400001)(118296001)(7736002)(71190400001)(36756003)(14444005)(256004)(72206003)(4326008)(2201001)(86362001)(486006)(68736007)(14454004)(6486002)(66066001)(316002)(8676002)(2501003)(102836004)(52116002)(2906002)(110136005)(26005)(99286004)(6506007)(54906003)(76176011)(2616005)(186003)(81156014)(5660300002)(81166006)(305945005)(50226002)(8936002)(6512007)(25786009)(53936002)(6116002)(446003)(106356001)(105586002)(3846002)(476003)(11346002)(386003);DIR:OUT;SFP:1101;SCL:1;SRVR:SN6PR12MB2784;H:SN6PR12MB2736.namprd12.prod.outlook.com;FPR:;SPF:None;LANG:en;PTR:InfoNoRecords;A:1;MX:1; received-spf: None (protection.outlook.com: amd.com does not designate permitted sender hosts) x-ms-exchange-senderadcheck: 1 x-microsoft-antispam-message-info: r8TZYo7KSHG6zwxbiJ+W9vzfYshfYJ++0nvo1xMWjZy4CZ/9hZqK4bRiMOTvZKCJmyOE2lKh/KT7NFp8eB05iHJMI6QyY5JBtkoH4WTkHncMk1BLblR+Vcq0Xr3OgJN1QQmslh3KS5fs6CHnirJwAhUhcTgKPQi9X5aH9OsQFsoRMdsoQ4rhIu3lr3CPkSPtLSd2B4+QgQxhAUEEbAy12K6X3LlzB4VzWLvV8Hsbqj+k4DMLhDK62kl7EAmKqh1A009I/633s4P9jkmN3mY8TyVuY5TCDVev8mMuauq6tVgBYUc2kJOZD0QD4Z9ew14q1WcbTVw3Rtcu7BVW/5X+HcmVPE4c/fJs8pD2s9je4Z9ZUvYge4LqNQ3V4QGU0EhkeR3hsnEJT+RamNXvz19cffxsmCJ69CeLF7FpA7XoKRY= MIME-Version: 1.0 X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-Network-Message-Id: 1d7e4330-6b65-48cf-fbdc-08d6b9441e41 X-MS-Exchange-CrossTenant-originalarrivaltime: 04 Apr 2019 21:25:53.8330 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-Transport-CrossTenantHeadersStamped: SN6PR12MB2784 Sender: linux-pm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Yazen Ghannam Some CPPC registers can be used to configure the platform. To enable this, create macros to define the show, store routines and create sysfs entries with R/W permission. Signed-off-by: Yazen Ghannam [ carved into a patch, cleaned up, productized ] Signed-off-by: Janakarajan Natarajan --- drivers/acpi/cppc_acpi.c | 31 +++++++++++++++++++++++++++++++ 1 file changed, 31 insertions(+) diff --git a/drivers/acpi/cppc_acpi.c b/drivers/acpi/cppc_acpi.c index 1cce231b8501..1e862415faf0 100644 --- a/drivers/acpi/cppc_acpi.c +++ b/drivers/acpi/cppc_acpi.c @@ -142,6 +142,10 @@ struct cppc_attr { static struct cppc_attr _name = \ __ATTR(_name, 0444, show_##_name, NULL) +#define define_one_cppc_rw(_name) \ +static struct cppc_attr _name = \ +__ATTR(_name, 0644, show_##_name, store_##_name) + #define to_cpc_desc(a) container_of(a, struct cpc_desc, kobj) #define show_cppc_data(access_fn, struct_name, member_name) \ @@ -164,6 +168,33 @@ __ATTR(_name, 0444, show_##_name, NULL) show_cppc_data(access_fn, struct_name, member_name) \ define_one_cppc_ro(member_name) +#define store_cppc_data(struct_name, member_name, reg_idx) \ + static ssize_t store_##member_name(struct kobject *kobj, \ + struct attribute *attr, \ + const char *c, ssize_t count)\ + { \ + struct cpc_desc *cpc_ptr = to_cpc_desc(kobj); \ + struct struct_name st_name = {0}; \ + u32 val; \ + int ret; \ + \ + ret = kstrtou32(c, 0, &val); \ + if (ret) \ + return ret; \ + \ + st_name.member_name = val; \ + \ + ret = cppc_set_reg(cpc_ptr->cpu_id, &st_name, reg_idx); \ + if (ret) \ + return ret; \ + \ + return count; \ + } \ + +#define store_cppc_data_rw(struct_name, member_name, reg_idx) \ + store_cppc_data(struct_name, member_name, reg_idx) \ + define_one_cppc_rw(member_name) + show_cppc_data_ro(cppc_get_perf_caps, cppc_perf_caps, highest_perf); show_cppc_data_ro(cppc_get_perf_caps, cppc_perf_caps, lowest_perf); show_cppc_data_ro(cppc_get_perf_caps, cppc_perf_caps, nominal_perf);