Message ID | cd9ddab845e471758b5553fcdc060d6eecd24e93.1492210847.git.sathyanarayanan.kuppuswamy@linux.intel.com (mailing list archive) |
---|---|
State | Not Applicable, archived |
Headers | show |
On Sat, Apr 15, 2017 at 1:25 AM, <sathyanarayanan.kuppuswamy@linux.intel.com> wrote: > From: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com> > > PMIC mfd driver only exports first level irq for GPIO device. > But currently we are reading the irqs from the second level irq > chip, So this patch fixes this issue by adding support to use > first level PMIC GPIO irq. > > Signed-off-by: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> I guess this gets merged into MFD because of dependencies? If it compiles on its own and doesn't cause regressions I can merged it into the GPIO tree. Yours, Linus Walleij
On Mon, Apr 24, 2017 at 4:17 PM, Linus Walleij <linus.walleij@linaro.org> wrote: > On Sat, Apr 15, 2017 at 1:25 AM, > <sathyanarayanan.kuppuswamy@linux.intel.com> wrote: > >> From: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com> >> >> PMIC mfd driver only exports first level irq for GPIO device. >> But currently we are reading the irqs from the second level irq >> chip, So this patch fixes this issue by adding support to use >> first level PMIC GPIO irq. >> >> Signed-off-by: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com> > > Acked-by: Linus Walleij <linus.walleij@linaro.org> > > I guess this gets merged into MFD because of dependencies? Yes. > If it compiles on its own and doesn't cause regressions I can > merged it into the GPIO tree. I guess it will break something if put it separately.
diff --git a/drivers/gpio/gpio-wcove.c b/drivers/gpio/gpio-wcove.c index 97613de..fd7ad85 100644 --- a/drivers/gpio/gpio-wcove.c +++ b/drivers/gpio/gpio-wcove.c @@ -51,6 +51,8 @@ #define GROUP1_NR_IRQS 6 #define IRQ_MASK_BASE 0x4e19 #define IRQ_STATUS_BASE 0x4e0b +#define GPIO_IRQ0_MASK 0x7f +#define GPIO_IRQ1_MASK 0x3f #define UPDATE_IRQ_TYPE BIT(0) #define UPDATE_IRQ_MASK BIT(1) @@ -399,7 +401,7 @@ static int wcove_gpio_probe(struct platform_device *pdev) if (!wg) return -ENOMEM; - wg->regmap_irq_chip = pmic->irq_chip_data_level2; + wg->regmap_irq_chip = pmic->irq_chip_data; platform_set_drvdata(pdev, wg); @@ -447,6 +449,18 @@ static int wcove_gpio_probe(struct platform_device *pdev) gpiochip_set_nested_irqchip(&wg->chip, &wcove_irqchip, virq); + /* Enable GPIO0 interrupts */ + ret = regmap_update_bits(wg->regmap, IRQ_MASK_BASE, GPIO_IRQ0_MASK, + 0x00); + if (ret) + return ret; + + /* Enable GPIO1 interrupts */ + ret = regmap_update_bits(wg->regmap, IRQ_MASK_BASE + 1, GPIO_IRQ1_MASK, + 0x00); + if (ret) + return ret; + return 0; }