From patchwork Wed Jan 16 09:57:38 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nicolas Ferre X-Patchwork-Id: 10765639 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id BCB0017FB for ; Wed, 16 Jan 2019 09:59:06 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 9105F2BDC3 for ; Wed, 16 Jan 2019 09:59:06 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 8545A2BE08; Wed, 16 Jan 2019 09:59:06 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.9 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 3760B2BDEB for ; Wed, 16 Jan 2019 09:59:06 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2403969AbfAPJ5z (ORCPT ); Wed, 16 Jan 2019 04:57:55 -0500 Received: from esa3.microchip.iphmx.com ([68.232.153.233]:49626 "EHLO esa3.microchip.iphmx.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729085AbfAPJ5y (ORCPT ); Wed, 16 Jan 2019 04:57:54 -0500 X-IronPort-AV: E=Sophos;i="5.56,485,1539673200"; d="scan'208";a="25551578" Received: from smtpout.microchip.com (HELO email.microchip.com) ([198.175.253.82]) by esa3.microchip.iphmx.com with ESMTP/TLS/DHE-RSA-AES256-SHA; 16 Jan 2019 02:57:53 -0700 Received: from tenerife.corp.atmel.com (10.10.76.4) by chn-sv-exch02.mchp-main.com (10.10.76.38) with Microsoft SMTP Server id 14.3.352.0; Wed, 16 Jan 2019 02:57:53 -0700 From: Nicolas Ferre To: Alexandre Belloni , Ludovic Desroches CC: , , Sebastian Reichel , , , "David S . Miller" , , Alan Stern , "Greg Kroah-Hartman" , Rob Herring , , Nicolas Ferre Subject: [PATCH 2/8] dt-bindings: arm: atmel: add new sam9x60 reset controller binding Date: Wed, 16 Jan 2019 10:57:38 +0100 Message-ID: X-Mailer: git-send-email 2.17.1 In-Reply-To: References: MIME-Version: 1.0 Sender: linux-pm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Update the Reset Controller's binding to add new SoC compatibility string. Signed-off-by: Nicolas Ferre Reviewed-by: Rob Herring --- Documentation/devicetree/bindings/arm/atmel-sysregs.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/arm/atmel-sysregs.txt b/Documentation/devicetree/bindings/arm/atmel-sysregs.txt index 36952cc39993..badce6ef3ab3 100644 --- a/Documentation/devicetree/bindings/arm/atmel-sysregs.txt +++ b/Documentation/devicetree/bindings/arm/atmel-sysregs.txt @@ -22,6 +22,7 @@ Its subnodes can be: RSTC Reset Controller required properties: - compatible: Should be "atmel,-rstc". can be "at91sam9260", "at91sam9g45", "sama5d3" or "samx7" + it also can be "microchip,sam9x60-rstc" - reg: Should contain registers location and length - clocks: phandle to input clock.