From patchwork Tue Dec 1 20:38:18 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: jubin.john@intel.com X-Patchwork-Id: 7740781 Return-Path: X-Original-To: patchwork-linux-rdma@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 784FD9F387 for ; Tue, 1 Dec 2015 20:38:50 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id B568D206B7 for ; Tue, 1 Dec 2015 20:38:49 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id CEB2D20692 for ; Tue, 1 Dec 2015 20:38:48 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1757067AbbLAUij (ORCPT ); Tue, 1 Dec 2015 15:38:39 -0500 Received: from mga09.intel.com ([134.134.136.24]:20304 "EHLO mga09.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1757049AbbLAUig (ORCPT ); Tue, 1 Dec 2015 15:38:36 -0500 Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by orsmga102.jf.intel.com with ESMTP; 01 Dec 2015 12:38:36 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.20,370,1444719600"; d="scan'208";a="864464903" Received: from phlsvsds.ph.intel.com ([10.228.195.38]) by fmsmga002.fm.intel.com with ESMTP; 01 Dec 2015 12:38:35 -0800 Received: from phlsvsds.ph.intel.com (localhost.localdomain [127.0.0.1]) by phlsvsds.ph.intel.com (8.13.8/8.13.8) with ESMTP id tB1KcYFM015289; Tue, 1 Dec 2015 15:38:34 -0500 Received: (from jjohn@localhost) by phlsvsds.ph.intel.com (8.13.8/8.13.8/Submit) id tB1KcYFw015284; Tue, 1 Dec 2015 15:38:34 -0500 X-Authentication-Warning: phlsvsds.ph.intel.com: jjohn set sender to jubin.john@intel.com using -f From: Jubin John To: gregkh@linuxfoundation.org, devel@driverdev.osuosl.org Cc: linux-rdma@vger.kernel.org, dledford@redhat.com, mike.marciniszyn@intel.com, ira.weiny@intel.com Subject: [PATCH v2 09/17] staging/rdma/hfi1: Correctly limit VLs against SDMA engines Date: Tue, 1 Dec 2015 15:38:18 -0500 Message-Id: <1449002306-15180-10-git-send-email-jubin.john@intel.com> X-Mailer: git-send-email 1.7.1 In-Reply-To: <1449002306-15180-1-git-send-email-jubin.john@intel.com> References: <1449002306-15180-1-git-send-email-jubin.john@intel.com> Sender: linux-rdma-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-rdma@vger.kernel.org X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Dean Luick Correctly reduce the number of VLs when limited by the number of SDMA engines. The hardware has multiple egress mechanisms, SDMA and pio, and multiples of those. These mechanisms are chosen using the VL (8) The fix corrects a panic issue with one of the platforms that doesn't have enough SDMA (4) mechanisms for the typical number of VLs. Reviewed-by: Mike Marciniszyn Signed-off-by: Dean Luick Signed-off-by: Jubin John --- Changes in v2: - Added more information in commit message drivers/staging/rdma/hfi1/chip.c | 6 +++--- 1 files changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/staging/rdma/hfi1/chip.c b/drivers/staging/rdma/hfi1/chip.c index d9bb389..d17fd29 100644 --- a/drivers/staging/rdma/hfi1/chip.c +++ b/drivers/staging/rdma/hfi1/chip.c @@ -10610,9 +10610,9 @@ struct hfi1_devdata *hfi1_init_dd(struct pci_dev *pdev, /* insure num_vls isn't larger than number of sdma engines */ if (HFI1_CAP_IS_KSET(SDMA) && num_vls > dd->chip_sdma_engines) { dd_dev_err(dd, "num_vls %u too large, using %u VLs\n", - num_vls, HFI1_MAX_VLS_SUPPORTED); - ppd->vls_supported = num_vls = HFI1_MAX_VLS_SUPPORTED; - ppd->vls_operational = ppd->vls_supported; + num_vls, dd->chip_sdma_engines); + num_vls = dd->chip_sdma_engines; + ppd->vls_supported = dd->chip_sdma_engines; } /*