From patchwork Thu Dec 10 19:54:32 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Majd Dibbiny X-Patchwork-Id: 7822051 Return-Path: X-Original-To: patchwork-linux-rdma@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 79DB69F7B5 for ; Thu, 10 Dec 2015 19:55:24 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id A683A205CB for ; Thu, 10 Dec 2015 19:55:23 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id CEA84205D3 for ; Thu, 10 Dec 2015 19:55:22 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753064AbbLJTzT (ORCPT ); Thu, 10 Dec 2015 14:55:19 -0500 Received: from [193.47.165.129] ([193.47.165.129]:43372 "EHLO mellanox.co.il" rhost-flags-FAIL-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1752511AbbLJTzS (ORCPT ); Thu, 10 Dec 2015 14:55:18 -0500 Received: from Internal Mail-Server by MTLPINE1 (envelope-from majd@mellanox.com) with ESMTPS (AES256-SHA encrypted); 10 Dec 2015 21:54:50 +0200 Received: from dev-l-vrt-202-005.mtl.labs.mlnx (dev-l-vrt-202-005.mtl.labs.mlnx [10.134.202.5]) by labmailer.mlnx (8.13.8/8.13.8) with ESMTP id tBAJsm5P027586; Thu, 10 Dec 2015 21:54:50 +0200 From: Majd Dibbiny To: eli@mellanox.com Cc: dledford@redhat.com, linux-rdma@vger.kernel.org, achiad@mellanox.com, matanb@mellanox.com, Majd Dibbiny Subject: [PATCH for-next 5/6] net/mlx5_core: Warn on unsupported events of QP/RQ/SQ Date: Thu, 10 Dec 2015 21:54:32 +0200 Message-Id: <1449777273-9219-6-git-send-email-majd@mellanox.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1449777273-9219-1-git-send-email-majd@mellanox.com> References: <1449777273-9219-1-git-send-email-majd@mellanox.com> Sender: linux-rdma-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-rdma@vger.kernel.org X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP When an event arrives on QP/RQ/SQ, check whether it's supported, and WARN_ON otherwise. Signed-off-by: Majd Dibbiny --- drivers/net/ethernet/mellanox/mlx5/core/qp.c | 52 ++++++++++++++++++++++++++++ 1 file changed, 52 insertions(+) diff --git a/drivers/net/ethernet/mellanox/mlx5/core/qp.c b/drivers/net/ethernet/mellanox/mlx5/core/qp.c index 27fed69..0b803a1 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/qp.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/qp.c @@ -68,6 +68,52 @@ void mlx5_core_put_rsc(struct mlx5_core_rsc_common *common) complete(&common->free); } +static u64 qp_allowed_event_types(void) +{ + u64 mask; + + mask = MLX5_EVENT_TYPE_PATH_MIG | + MLX5_EVENT_TYPE_COMM_EST | + MLX5_EVENT_TYPE_SQ_DRAINED | + MLX5_EVENT_TYPE_SRQ_LAST_WQE | + MLX5_EVENT_TYPE_WQ_CATAS_ERROR | + MLX5_EVENT_TYPE_PATH_MIG_FAILED | + MLX5_EVENT_TYPE_WQ_INVAL_REQ_ERROR | + MLX5_EVENT_TYPE_WQ_ACCESS_ERROR; + + return mask; +} + +static u64 rq_allowed_event_types(void) +{ + u64 mask; + + mask = MLX5_EVENT_TYPE_SRQ_LAST_WQE | + MLX5_EVENT_TYPE_WQ_CATAS_ERROR; + + return mask; +} + +static u64 sq_allowed_event_types(void) +{ + return MLX5_EVENT_TYPE_WQ_CATAS_ERROR; +} + +static bool is_event_type_allowed(int rsc_type, int event_type) +{ + switch (rsc_type) { + case MLX5_EVENT_QUEUE_TYPE_QP: + return !!(BIT(event_type) & qp_allowed_event_types()); + case MLX5_EVENT_QUEUE_TYPE_RQ: + return !!(BIT(event_type) & rq_allowed_event_types()); + case MLX5_EVENT_QUEUE_TYPE_SQ: + return !!(BIT(event_type) & sq_allowed_event_types()); + default: + WARN_ON(1); + return false; + } +} + void mlx5_rsc_event(struct mlx5_core_dev *dev, u32 rsn, int event_type) { struct mlx5_core_rsc_common *common = mlx5_get_rsc(dev, rsn); @@ -76,6 +122,12 @@ void mlx5_rsc_event(struct mlx5_core_dev *dev, u32 rsn, int event_type) if (!common) return; + if (!is_event_type_allowed((rsn >> 24), event_type)) { + mlx5_core_warn(dev, "event 0x%.2x is not allowed on resource 0x%.8x\n", + event_type, rsn); + return; + } + switch (common->res) { case MLX5_RES_QP: case MLX5_RES_RQ: