From patchwork Tue Feb 23 08:25:23 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Leon Romanovsky X-Patchwork-Id: 8388911 Return-Path: X-Original-To: patchwork-linux-rdma@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id EF49B9F1D4 for ; Tue, 23 Feb 2016 08:29:50 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id F3C0E20392 for ; Tue, 23 Feb 2016 08:29:49 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 0246C2047C for ; Tue, 23 Feb 2016 08:29:49 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932755AbcBWI3s (ORCPT ); Tue, 23 Feb 2016 03:29:48 -0500 Received: from mail-wm0-f42.google.com ([74.125.82.42]:35738 "EHLO mail-wm0-f42.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932568AbcBWI3r (ORCPT ); Tue, 23 Feb 2016 03:29:47 -0500 Received: by mail-wm0-f42.google.com with SMTP id c200so208063699wme.0 for ; Tue, 23 Feb 2016 00:29:46 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=leon-nu.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=8KgSG51wLLU4tbGXnTmH5bDQQuNPoqMtKg9NLU6yM3k=; b=Xvw0dAPpeoxeImb1m15Yy9uJNVDm1yi1x0qIwjc7vaFgQYIfIIy1rEcjY/QSo/fPbV VseMyJiU7I4iNSBZqqYbjd2wyRqPCsy0Osmj7vzdFYU/603OS+9VrelTZHlv2u/IoAaq 5ID8IdON8AhqLy714E7By/eys7NZOlBwZ1+XswAPRW1w8VOKDQT4pSV6PnawxfFDpbj4 5ep0mq/PKrNTTC2LjbsNQw9zVgMRE/+iFl+7Zx7DtY4ckM4xBHfHIxqPpmEhtmzcEwgm BL8WvwW7f6ORnwuiEaSY1gT8f7aLCnqoos7cOqDd84CXe2CKPCKnkgGulWu7AT8CHLrC dNsA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=8KgSG51wLLU4tbGXnTmH5bDQQuNPoqMtKg9NLU6yM3k=; b=HfgE2vj6BawN5mvf8LJEsABvFNXtlFCyfqoRHLgsozFsOu2sZo+vin5hdy1Ksgb1dx O7uZD5z3Vrr3Ke86EB8xWqCbBZpiKojPSPw5ext9ATNqnuoHOUH4KCXZek5qToZ2syhk rwPt3eVm0yQ71EqUxMP3wmUJZOD8hg2KBJIsqK7i9U2vduBzQmtCkI38+6gKP5PYJlSo Xpw14d97CpSGoF7nVj9Bg40Pwde9mp6wZ8zhdAM33aZKLZ41A1aQfcF8E4Fc4lkbWdaZ yMQlv7h8SPm64TcutCQ7swCMtkKLMYcOfkK5MGLo0FD7tJPDcnsErvpPm1jXwPWRu6pc sO5A== X-Gm-Message-State: AG10YOQmBLTSwcO//fhldoarTFWdZoKpUFBKbG8JW/sVE20d0zHKnr8lOnTE7Pq7m0kikg== X-Received: by 10.28.188.138 with SMTP id m132mr17225084wmf.29.1456216186355; Tue, 23 Feb 2016 00:29:46 -0800 (PST) Received: from localhost ([213.57.247.249]) by smtp.gmail.com with ESMTPSA id cb2sm28577727wjc.16.2016.02.23.00.29.45 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 23 Feb 2016 00:29:45 -0800 (PST) From: Leon Romanovsky To: dledford@redhat.com, saeedm@mellanox.com Cc: linux-rdma@vger.kernel.org, Sagi Grimberg , Leon Romanovsky Subject: [PATCH rdma-next V1 3/8] net/mlx5_core: Introduce offload arithmetic hardware capabilities Date: Tue, 23 Feb 2016 10:25:23 +0200 Message-Id: <1456215928-9305-4-git-send-email-leon@leon.nu> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1456215928-9305-1-git-send-email-leon@leon.nu> References: <1456215928-9305-1-git-send-email-leon@leon.nu> Sender: linux-rdma-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-rdma@vger.kernel.org X-Spam-Status: No, score=-6.8 required=5.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI,RP_MATCHES_RCVD,T_DKIM_INVALID,UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Sagi Grimberg Define the necessary hardware structures for the offload arithmetic capabilities and read/cache them on driver load. Signed-off-by: Sagi Grimberg Signed-off-by: Leon Romanovsky Reviewed-by: Saeed Mahameed --- drivers/net/ethernet/mellanox/mlx5/core/fw.c | 6 ++++++ include/linux/mlx5/device.h | 6 ++++++ include/linux/mlx5/mlx5_ifc.h | 31 +++++++++++++++++++++++++++- 3 files changed, 42 insertions(+), 1 deletion(-) diff --git a/drivers/net/ethernet/mellanox/mlx5/core/fw.c b/drivers/net/ethernet/mellanox/mlx5/core/fw.c index fe6dfd8..75c7ae6 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/fw.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/fw.c @@ -145,6 +145,12 @@ int mlx5_query_hca_caps(struct mlx5_core_dev *dev) return err; } + if (MLX5_CAP_GEN(dev, vector_calc)) { + err = mlx5_core_get_caps(dev, MLX5_CAP_VECTOR_CALC); + if (err) + return err; + } + return 0; } diff --git a/include/linux/mlx5/device.h b/include/linux/mlx5/device.h index 987764a..1f2cedf 100644 --- a/include/linux/mlx5/device.h +++ b/include/linux/mlx5/device.h @@ -1196,6 +1196,8 @@ enum mlx5_cap_type { MLX5_CAP_FLOW_TABLE, MLX5_CAP_ESWITCH_FLOW_TABLE, MLX5_CAP_ESWITCH, + MLX5_CAP_RESERVED, + MLX5_CAP_VECTOR_CALC, /* NUM OF CAP Types */ MLX5_CAP_NUM }; @@ -1258,6 +1260,10 @@ enum mlx5_cap_type { #define MLX5_CAP_ODP(mdev, cap)\ MLX5_GET(odp_cap, mdev->hca_caps_cur[MLX5_CAP_ODP], cap) +#define MLX5_CAP_VECTOR_CALC(mdev, cap) \ + MLX5_GET(vector_calc_cap, \ + mdev->hca_caps_cur[MLX5_CAP_VECTOR_CALC], cap) + enum { MLX5_CMD_STAT_OK = 0x0, MLX5_CMD_STAT_INT_ERR = 0x1, diff --git a/include/linux/mlx5/mlx5_ifc.h b/include/linux/mlx5/mlx5_ifc.h index 455d9cc..d34ad50 100644 --- a/include/linux/mlx5/mlx5_ifc.h +++ b/include/linux/mlx5/mlx5_ifc.h @@ -617,6 +617,33 @@ struct mlx5_ifc_odp_cap_bits { u8 reserved_at_80[0x720]; }; +struct mlx5_ifc_calc_op { + u8 reserved_at_0[0x10]; + u8 reserved_at_10[0x9]; + u8 op_swap_endianness[0x1]; + u8 op_min[0x1]; + u8 op_xor[0x1]; + u8 op_or[0x1]; + u8 op_and[0x1]; + u8 op_max[0x1]; + u8 op_add[0x1]; +}; + +struct mlx5_ifc_vector_calc_cap_bits { + u8 calc_matrix[0x1]; + u8 reserved_at_1[0x1f]; + u8 reserved_at_20[0x8]; + u8 max_vec_count[0x8]; + u8 reserved_at_30[0xd]; + u8 max_chunk_size[0x3]; + struct mlx5_ifc_calc_op calc0; + struct mlx5_ifc_calc_op calc1; + struct mlx5_ifc_calc_op calc2; + struct mlx5_ifc_calc_op calc3; + + u8 reserved_at_e0[0x720]; +}; + enum { MLX5_WQ_TYPE_LINKED_LIST = 0x0, MLX5_WQ_TYPE_CYCLIC = 0x1, @@ -781,7 +808,8 @@ struct mlx5_ifc_cmd_hca_cap_bits { u8 cd[0x1]; u8 reserved_at_22c[0x1]; u8 apm[0x1]; - u8 reserved_at_22e[0x7]; + u8 vector_calc[0x1]; + u8 reserved_at_22f[0x6]; u8 qkv[0x1]; u8 pkv[0x1]; u8 reserved_at_237[0x4]; @@ -1918,6 +1946,7 @@ union mlx5_ifc_hca_cap_union_bits { struct mlx5_ifc_flow_table_nic_cap_bits flow_table_nic_cap; struct mlx5_ifc_flow_table_eswitch_cap_bits flow_table_eswitch_cap; struct mlx5_ifc_e_switch_cap_bits e_switch_cap; + struct mlx5_ifc_vector_calc_cap_bits vector_calc_cap; u8 reserved_at_0[0x8000]; };