From patchwork Tue May 10 03:04:25 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lijun Ou X-Patchwork-Id: 9053611 Return-Path: X-Original-To: patchwork-linux-rdma@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 547E49F1C3 for ; Tue, 10 May 2016 02:58:28 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 38EA62012B for ; Tue, 10 May 2016 02:58:27 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 1D2EE2009C for ; Tue, 10 May 2016 02:58:26 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754105AbcEJC5V (ORCPT ); Mon, 9 May 2016 22:57:21 -0400 Received: from szxga02-in.huawei.com ([119.145.14.65]:59017 "EHLO szxga02-in.huawei.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753526AbcEJCvj (ORCPT ); Mon, 9 May 2016 22:51:39 -0400 Received: from 172.24.1.60 (EHLO szxeml430-hub.china.huawei.com) ([172.24.1.60]) by szxrg02-dlp.huawei.com (MOS 4.3.7-GA FastPath queued) with ESMTP id DGX48769; Tue, 10 May 2016 10:51:31 +0800 (CST) Received: from linux-ioko.site (10.71.200.31) by szxeml430-hub.china.huawei.com (10.82.67.185) with Microsoft SMTP Server id 14.3.235.1; Tue, 10 May 2016 10:51:18 +0800 From: Lijun Ou To: , , , , , , CC: , , , , , , , , , , , Subject: [RESEND PATCH v7 03/21] IB/hns: Add initial main frame driver and get cfg info Date: Tue, 10 May 2016 11:04:25 +0800 Message-ID: <1462849483-67927-4-git-send-email-oulijun@huawei.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1462849483-67927-1-git-send-email-oulijun@huawei.com> References: <1462849483-67927-1-git-send-email-oulijun@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.71.200.31] X-CFilter-Loop: Reflected X-Mirapoint-Virus-RAPID-Raw: score=unknown(0), refid=str=0001.0A020205.57314CB4.00C6, ss=1, re=0.000, recu=0.000, reip=0.000, cl=1, cld=1, fgs=0, ip=0.0.0.0, so=2013-06-18 04:22:30, dmn=2013-03-21 17:37:32 X-Mirapoint-Loop-Id: 36408a108b537bf0d088285f35da81c2 Sender: linux-rdma-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-rdma@vger.kernel.org X-Spam-Status: No, score=-9.0 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This patch mainly added the initial bare main driver. It could get the relative configure information of net node. Signed-off-by: Wei Hu Signed-off-by: Nenglong Zhao Signed-off-by: Lijun Ou --- drivers/infiniband/hw/hns/hns_roce_device.h | 49 ++++++++ drivers/infiniband/hw/hns/hns_roce_main.c | 182 ++++++++++++++++++++++++++++ 2 files changed, 231 insertions(+) create mode 100644 drivers/infiniband/hw/hns/hns_roce_device.h create mode 100644 drivers/infiniband/hw/hns/hns_roce_main.c diff --git a/drivers/infiniband/hw/hns/hns_roce_device.h b/drivers/infiniband/hw/hns/hns_roce_device.h new file mode 100644 index 0000000..b48f518 --- /dev/null +++ b/drivers/infiniband/hw/hns/hns_roce_device.h @@ -0,0 +1,49 @@ +/* + * Copyright (c) 2016 Hisilicon Limited. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#ifndef _HNS_ROCE_DEVICE_H +#define _HNS_ROCE_DEVICE_H + +#include +#include +#include +#include +#include +#include +#include +#include + +#define DRV_NAME "hns_roce" + +#define HNS_ROCE_MAX_IRQ_NUM 34 +#define HNS_ROCE_MAX_PORTS 6 + +struct hns_roce_ib_iboe { + struct net_device *netdevs[HNS_ROCE_MAX_PORTS]; + u8 phy_port[HNS_ROCE_MAX_PORTS]; +}; + +struct hns_roce_caps { + u8 num_ports; +}; + +struct hns_roce_dev { + struct ib_device ib_dev; + struct platform_device *pdev; + struct hns_roce_ib_iboe iboe; + + int irq[HNS_ROCE_MAX_IRQ_NUM]; + u8 __iomem *reg_base; + struct hns_roce_caps caps; + + int cmd_mod; + int loop_idc; +}; + +#endif /* _HNS_ROCE_DEVICE_H */ diff --git a/drivers/infiniband/hw/hns/hns_roce_main.c b/drivers/infiniband/hw/hns/hns_roce_main.c new file mode 100644 index 0000000..1616148 --- /dev/null +++ b/drivers/infiniband/hw/hns/hns_roce_main.c @@ -0,0 +1,182 @@ +/* + * Copyright (c) 2016 Hisilicon Limited. + * + * Authors: Wei Hu + * Authors: Nenglong Zhao + * Authors: Lijun Ou + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "hns_roce_device.h" + +int hns_roce_get_cfg(struct hns_roce_dev *hr_dev) +{ + int i; + u8 phy_port; + int port_cnt = 0; + struct device *dev = &hr_dev->pdev->dev; + struct device_node *np = dev->of_node; + struct device_node *net_node; + struct net_device *netdev = NULL; + struct platform_device *pdev = NULL; + struct resource *res; + + if (!of_device_is_compatible(np, "hisilicon,hns-roce-v1")) { + dev_err(dev, "device no compatible!\n"); + return -EINVAL; + } + + res = platform_get_resource(hr_dev->pdev, IORESOURCE_MEM, 0); + hr_dev->reg_base = devm_ioremap_resource(dev, res); + if (!hr_dev->reg_base) { + dev_err(dev, "devm_ioremap_resource failed!\n"); + return -ENOMEM; + } + + for (i = 0; i < HNS_ROCE_MAX_PORTS; i++) { + net_node = of_parse_phandle(np, "eth-handle", i); + if (net_node) { + pdev = of_find_device_by_node(net_node); + netdev = platform_get_drvdata(pdev); + phy_port = (u8)i; + if (netdev) { + hr_dev->iboe.netdevs[port_cnt] = netdev; + hr_dev->iboe.phy_port[port_cnt] = phy_port; + } else { + return -ENODEV; + } + port_cnt++; + } + } + + hr_dev->caps.num_ports = port_cnt; + + /* Cmd issue mode: 0 is poll, 1 is event */ + hr_dev->cmd_mod = 1; + hr_dev->loop_idc = 0; + + for (i = 0; i < HNS_ROCE_MAX_IRQ_NUM; i++) { + hr_dev->irq[i] = platform_get_irq(hr_dev->pdev, i); + if (hr_dev->irq[i] <= 0) { + dev_err(dev, "Get No.%d irq resource failed!\n", i); + return -EINVAL; + } + } + + return 0; +} + +/** +* hns_roce_probe - RoCE driver entrance +* @pdev: pointer to platform device +* Return : int +* +*/ +static int hns_roce_probe(struct platform_device *pdev) +{ + int ret; + struct hns_roce_dev *hr_dev; + struct device *dev = &pdev->dev; + + hr_dev = (struct hns_roce_dev *)ib_alloc_device(sizeof(*hr_dev)); + if (!hr_dev) { + dev_err(dev, "Device struct alloc failed, aborting.\n"); + return -ENOMEM; + } + + memset((u8 *)hr_dev + sizeof(struct ib_device), 0, + sizeof(struct hns_roce_dev) - sizeof(struct ib_device)); + + hr_dev->pdev = pdev; + platform_set_drvdata(pdev, hr_dev); + + if (!dma_set_mask_and_coherent(dev, DMA_BIT_MASK(64ULL))) + dev_info(dev, "set mask to 64bit\n"); + else if (!dma_set_mask_and_coherent(dev, DMA_BIT_MASK(32ULL))) + dev_info(dev, "set mask to 32bit\n"); + else { + dev_err(dev, "No usable DMA addressing mode\n"); + ret = -EIO; + goto error_failed_get_cfg; + } + + ret = hns_roce_get_cfg(hr_dev); + if (ret) { + dev_err(dev, "Get Configuration failed!\n"); + goto error_failed_get_cfg; + } + +error_failed_get_cfg: + ib_dealloc_device(&hr_dev->ib_dev); + + return ret; +} + +/** +* hns_roce_remove - remove roce device +* @pdev: pointer to platform device +*/ +static int hns_roce_remove(struct platform_device *pdev) +{ + struct hns_roce_dev *hr_dev = platform_get_drvdata(pdev); + + ib_dealloc_device(&hr_dev->ib_dev); + + return 0; +} + +static const struct of_device_id hns_roce_of_match[] = { + { .compatible = "hisilicon,hns-roce-v1",}, + {}, +}; +MODULE_DEVICE_TABLE(of, hns_roce_of_match); + +static struct platform_driver hns_roce_driver = { + .probe = hns_roce_probe, + .remove = hns_roce_remove, + .driver = { + .name = DRV_NAME, + .of_match_table = hns_roce_of_match, + }, +}; + +module_platform_driver(hns_roce_driver); + +MODULE_LICENSE("GPL v2"); +MODULE_AUTHOR("Wei Hu "); +MODULE_AUTHOR("Nenglong Zhao "); +MODULE_AUTHOR("Lijun Ou "); +MODULE_DESCRIPTION("HISILICON RoCE driver"); +MODULE_ALIAS("platform:" DRV_NAME);