From patchwork Tue Jul 12 19:36:40 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Adit Ranadive X-Patchwork-Id: 9226075 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id A05F960868 for ; Tue, 12 Jul 2016 19:38:02 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 89F942756B for ; Tue, 12 Jul 2016 19:38:02 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 7EA9927DCD; Tue, 12 Jul 2016 19:38:02 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI,T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 3395327D85 for ; Tue, 12 Jul 2016 19:38:00 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751659AbcGLThr (ORCPT ); Tue, 12 Jul 2016 15:37:47 -0400 Received: from ex13-edg-ou-001.vmware.com ([208.91.0.189]:4610 "EHLO EX13-EDG-OU-001.vmware.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751647AbcGLTho (ORCPT ); Tue, 12 Jul 2016 15:37:44 -0400 Received: from sc9-mailhost3.vmware.com (10.113.161.73) by EX13-EDG-OU-001.vmware.com (10.113.208.155) with Microsoft SMTP Server id 15.0.1156.6; Tue, 12 Jul 2016 12:37:20 -0700 Received: from EX13-CAS-005.vmware.com (ex13-cas-005.vmware.com [10.113.191.55]) by sc9-mailhost3.vmware.com (Postfix) with ESMTP id CD1E040747; Tue, 12 Jul 2016 12:37:43 -0700 (PDT) Received: from EX13-CAS-002.vmware.com (10.113.191.52) by EX13-MBX-001.vmware.com (10.113.191.21) with Microsoft SMTP Server (TLS) id 15.0.1156.6; Tue, 12 Jul 2016 12:37:43 -0700 Received: from NAM02-SN1-obe.outbound.protection.outlook.com (10.113.170.11) by EX13-CAS-002.vmware.com (10.113.191.52) with Microsoft SMTP Server (TLS) id 15.0.1156.6 via Frontend Transport; Tue, 12 Jul 2016 12:37:43 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=onevmw.onmicrosoft.com; s=selector1-vmware-com; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version; bh=4qauDpMCKHzmApE6aM/2Bcq8LT+3Ko5xurjuonFiuds=; b=CC08pgQcsP72cyP6PtWoJ0+FyRagpmwZ/AtekCEqdEWREg7aC2e4wrAkb/9Kw+rL7m/fCG+gLQxFHnqHLiOB4bhj9WOnqjiF7ltd4jR93JVu2367vXe0l0y4iRz+IP4CIzul7atWO/SXLDbDNpRx638zsXHh6bdsA4+KUO3qLW0= Authentication-Results: spf=none (sender IP is ) smtp.mailfrom=aditr@vmware.com; Received: from promb-2s-dhcp95-136.eng.vmware.com (208.91.1.34) by BLUPR0501MB834.namprd05.prod.outlook.com (10.141.251.148) with Microsoft SMTP Server (TLS) id 15.1.539.14; Tue, 12 Jul 2016 19:37:39 +0000 From: Adit Ranadive To: , , CC: Adit Ranadive , , , , Subject: [PATCH v2 10/15] IB/pvrdma: Add Queue Pair support Date: Tue, 12 Jul 2016 12:36:40 -0700 Message-ID: <1468352205-9137-11-git-send-email-aditr@vmware.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1468352205-9137-1-git-send-email-aditr@vmware.com> References: <1468352205-9137-1-git-send-email-aditr@vmware.com> MIME-Version: 1.0 X-Originating-IP: [208.91.1.34] X-ClientProxiedBy: SN1PR10CA0055.namprd10.prod.outlook.com (10.164.10.151) To BLUPR0501MB834.namprd05.prod.outlook.com (10.141.251.148) X-MS-Office365-Filtering-Correlation-Id: 30e6e559-f798-47f7-1de2-08d3aa8bfcc9 X-Microsoft-Exchange-Diagnostics: 1; BLUPR0501MB834; 2:AhHeVtEQYlJWknjZqaUxMXFitlE2Qs5juxx/+n8Ym9dIQaZHDhj5Un49SSb4J+mf+bECaAZVgeHPL8+wqGAvYgbGKJKP8qxIkPtpeWzB4JT2BNog1PjjGgyLMWwnIAcbQfkx0exwrQ6FLQKBtQUEZ8puBFtbUxG0OkTXl1IV7rGZTQj3TWfywFAw7IsI+f0o; 3:Dz5RdtM9NUP7phSDos2nIq1tXiX2JjrlIU0zJVSVT+tNJ9Ele4ivNIb42XStXhfEiufUSS6R43rDwLxnUlbTa99KdkD2/myTnPpfH00nCRio8VA0zgsmOR40waZDEwqj X-Microsoft-Antispam: UriScan:;BCL:0;PCL:0;RULEID:;SRVR:BLUPR0501MB834; X-Microsoft-Exchange-Diagnostics: 1; BLUPR0501MB834; 25:w6YkIR7uPdMdD5nKrvdIsuBEhh1+uhQLsLXwSDS50p/WXheL7MOQOxLndSu6YwrowgdHpYe9ypo8EnCrqn9F+Wndb0Eev0O+cVX4XAMueQBZamb0xZKDwo9ppRY9CXoOj6jRHfAj6+9uvKhpSFqLGB4B9JGdsV4kJjaA56l9ylumeDZ5PGl50NGYBcOrU21efJVS+05yglBmLSnPLCSCJmZ9/WvotKcMkncRcnS7ii9SEN2KtlKufsuhlEH7nxDLf6OSUi9P4FaGPMAcW9K+b3y2ZfICohGDGl74pOhlIeNDOxNQV65Jw40kQA/rfDisMplPv+DwRhRmT6ilix2Ht6kFmUartBCW9IzQQQtcuKHdHSG5L5ByE0tjKCsbdwQXl5Qcjv0LOMBi5O4+RY/E3DJz7g2FCCcSP/IB/MDkyVTpvIDeR/CKC7WUoIfLojB7gqtW37sKz9fnw3k42JhhvBMsWk5ImwUJYiu4vy0YBWQPfXzSVEhUz2WCYvKGsQCmR50GTGe3BJX9Tp4dNYLiOzBHKwlQh/X4yLSvI+myud+0iP6ZBfJcKy1fd3uyR+YU37jzNIgRKta2sKKrrj4NNUqN1Pue+63VooV0BrouivBLlLhL2cDrlpQ9C3MfIPb36GFQX2sXB1mTsZmMYp4gAOP2uxgxzWvUAgfX5IGX4qgTAlQZzzI5kGnnkoZMhljHhp5EOTUSupcSHmEu/8aCJJ+b5VRPP9lvuj4cqHylOdg8GXFN0YSEkVHhChugi9tnxk9CQ6tFzk6Fy7a0PIfbMattNsUvaGw+mjtWFCnpnE/i5nEFzx6IDHHJXVOpnEri X-Microsoft-Exchange-Diagnostics: 1; BLUPR0501MB834; 31:1Ai5zIZza/6zCmKirj0gsUYLY4U6XhuABKaCaGhJapPOB19XgyLaz3uw/ALIZFnFR2gUmn/Xugmj7lU2keHaqadGzer1FYwFGH6A4mexJ6hyojl2jQMejxTbpgwVygAlMUx2MyUErk93OvncklMiUh3+7IrVcr/mAW2KjvSVo2HpfeKZIUsACO3LidA6Xm0hFrFAojsG0lykGUmNSntYmw==; 20:iSYz7zaOiNarFpESpQKeqGvSyDEzTi7cQRhSVujGcpNF0pz2ZFzfOWLLtOKklUhA1qsInuxCQmvUV+RIoi+M0Y8ysTMjABz5MuxN/LG5RmAw6kNP7yfjdSgBfGqN1bMlz4Y7fX3FxA16CwFcFuak3sV4fN8qOFb7lU2IhGqZqRR5MC2q5XhARDKrR0IF5DgZSmF/ErO1CUOyo44AEzD9pOMeyNS3uMW1KcQnfG5wsky8w4O4EObKSP07491E3FGa; 4:sLSl24rxj7SoZTxSwoxD0kQD/rtOj9sPmSMGjQCDOh2rBJDVgGxkQdx11RPagTMqccRMwFNdyUkAGUgCJ65OzmOLhE0WgtNjn1GHUIJMwDtgc1K3dWl3crCgGEXBQb/o9kR3gfnmsqOVI2H5uxi/ejgUT6bXg74/N+5enxJJpMLg9DiRpVc5B8Icy3p3XxvSv51fTrS+2exBI3kYMGRYAdWn3UBkXpnC0wNgOOWR+ehGl4aL3rWlHC8H7ElSEn5UdhpdYYZ6ezPGokTWzB8Hkbswr3gBI8x7ybxnlnJC5EPuds6kh7wnBEuHznT+7ZtR+sqFxnPBF5M/kTUEYzWLqH6Y4oWFLMDNCvaeVuilMIMYHtEEGSX3h0o2otpQrQgBVoK2zlJOXaIFSAx2UNjsKRHAsUueJ+yrtXF7y5HxvgvqiZPtZJ6wQkNkRMKbmNkfnck6BxtDo wlOjxXdXWmyaZTUuEiqtpuXXRqtuLHi49o= X-Microsoft-Antispam-PRVS: X-Exchange-Antispam-Report-Test: UriScan:(250305191791016)(61668805478150)(22074186197030); X-Exchange-Antispam-Report-CFA-Test: BCL:0; PCL:0; RULEID:(601004)(2401047)(5005006)(8121501046)(3002001)(10201501046); SRVR:BLUPR0501MB834; BCL:0; PCL:0; RULEID:; SRVR:BLUPR0501MB834; X-Forefront-PRVS: 0001227049 X-Forefront-Antispam-Report: SFV:NSPM; SFS:(10009020)(4630300001)(6009001)(7916002)(199003)(189002)(305945005)(7736002)(50226002)(86362001)(4326007)(2906002)(42186005)(7846002)(68736007)(33646002)(229853001)(106356001)(50986999)(586003)(3846002)(2201001)(6116002)(15975445007)(97736004)(81166006)(81156014)(48376002)(36756003)(5003940100001)(19580395003)(19580405001)(47776003)(2950100001)(77096005)(66066001)(50466002)(4001450100002)(4001430100002)(101416001)(92566002)(189998001)(76176999)(105586002)(8676002)(107886002)(5001770100001)(7099028)(2004002); DIR:OUT; SFP:1101; SCL:1; SRVR:BLUPR0501MB834; H:promb-2s-dhcp95-136.eng.vmware.com; FPR:; SPF:None; PTR:InfoNoRecords; A:1; MX:1; LANG:en; Received-SPF: None (EX13-EDG-OU-001.vmware.com: aditr@vmware.com does not designate permitted sender hosts) Received-SPF: None (protection.outlook.com: vmware.com does not designate permitted sender hosts) X-Microsoft-Exchange-Diagnostics: =?us-ascii?Q?1; BLUPR0501MB834; 23:SZNXxKwAtn2wScG6Qxrt8XmnUQLDlOwBc/HV8aXy?= =?us-ascii?Q?zwjC9j7vpRfSHUOJ3TBfyvjf1UF3lhmJ1G/CY5FUmsx16KOJjMVlNYd/H64i?= =?us-ascii?Q?Vt0llXWO4VPPl/IZUnP9bK8CueJWP9Age6k14TUwtDAdAZxfwiPrgzsHzeh8?= =?us-ascii?Q?MrrbbzNgZt4dbyKv2fTr6gqQ1407Q2kjfCCWWZNuc4mUlluFYvPlh8VAWl/1?= =?us-ascii?Q?q9xI5TXSs9SI5oY73bm4MrLjY7x/xHQ44xtLC7DpwLc7rPBRXu9ljZYHAjqq?= =?us-ascii?Q?3Ga5t65Fau76muXvxhvXs47K1tNYYrH61Gv+5V4FcURSenuCNdbLPI/uvpt+?= =?us-ascii?Q?ri95+VhvE68ExPE4HquGuXfJsX3jci6fjC2H/nFrsaT7SvoR6geZFkvuMTC4?= =?us-ascii?Q?YLt2CvaO1PQeC6gPBdyctUiPd9OwVsUuSG0/sqNNeTUSoZ2xfolBaHwUFvPC?= =?us-ascii?Q?f8Ldfmahesc29CopptLAz1w0BEzewHfBkeVPsW3ajgHzgu2lgketUQUUWvwW?= =?us-ascii?Q?3fcTngsTR4mZ9eSr4q5tvYl3qGG/dMKOs/fuHv4Eue5jCDmnqBHH0zrLcLZ/?= =?us-ascii?Q?+Vrg9vEJ/aHXKcuxxCvpfyxy7cL6jqBzZMIEpfqL8JrhUvNbWdanYaVoho7z?= =?us-ascii?Q?1pLZmGhESPO4R/AxNPTF5VKAWhkDh0isB+y7Mk34P/RMw8q/dSNFEinwQb9n?= =?us-ascii?Q?6DQ3PTp+AAF+OURlTIg1nNnCjDe3lyBqfCj/lg0eOZMhR5jUhcNjN+aXWlRk?= =?us-ascii?Q?6fXY8T/BDA2hpYC5e+78VU1r5VAd/6vsGWSnO4Py0XNf67OxaGNbsElJxLiS?= =?us-ascii?Q?Vl4SA12P3D9HyLYyA4hrNOFqRa3qxAK1jrQmE/oSrSsGtrEmn5DE+LGY49H4?= =?us-ascii?Q?Q1cMKXJdqgqV9ZhpotUzTpTeYaY5W+2N2m9EEzOd4TuoQfP1Rf7ul1eHnEDI?= =?us-ascii?Q?SGCFHUTjhlBViZkpWYcxcHnY6KDFmU87Z9QlfcCaQM9KRncv+A3zoJkakSLQ?= =?us-ascii?Q?N4en3ssnbd0fJUDZj+x5ltedYGXX0+QGQ1T/8gnDAiouQ+AqaUxhN/orzQR5?= =?us-ascii?Q?PovHb5MBUY+P0JUHHTvv+t7ql+QyiV48/0s+kvXuCMzsBJ7UzdRACFbEOL/B?= =?us-ascii?Q?YbdwdbXXZkd42JvmCnzJzjXlmp75M/izGCtlEiPDNRAUwzYI4PqepVi784LG?= =?us-ascii?Q?NhBQmfI23QUhLUD3p6JSbollyoLEfx/QsYFFvSgwmiSd2LeeC6IhSDnlLQ?= =?us-ascii?Q?=3D=3D?= X-Microsoft-Exchange-Diagnostics: 1; BLUPR0501MB834; 6:0lrkNXxnMtG6GtSSt6DlqktW+UxcsIyV0Gy+/WayG8v8n9IT4YiE9/xm7/MinUhcSRp8Ftkn7ZgwjB7i++pTF6zlnqGDV+ApCUqcdJ+TBulsMGb6rpavf9vfEEpfeVsi5b9mlX8GMD0sxbQzjWMqK0howGeESYLKnepGLQmxTwdBwXS2mRZo1usSWGa03eD/z6FhrxbP2qNLMLmIzFJuAQq4QnFsZMvAx8Vj9omfnJjDdv9gtbGf/hSw1dV3LL/6iaBQgZZC6SjGviOdnPWW2GF0rQuZ4iex7lp1AzMnztU=; 5:QSntj2g/GojQoETpfcQj1Mo92MW7X82zuy1XADyG6tImuYC5ODw5m5BRWNJWuw2a5IJndzUSOryYabRjKUjk7ktkFWSYLiFjK3huD+FAQBGjBw9QuKgRCgAxVAazdJFV15JxUVuU91J8MXKai4MKvg==; 24:44MRC5af31t4wCHWxvWquIvlfmFHFnBt/yuLv2KiO+Mc7T2z5KRPyTDVCkWXsiAZw3e2lB4rMLEuSiw/aQijiBBqmXmjKvqXKH9hbj8Q0nA=; 7:edvuOd71ObDuCxju0CBm7rVuMLiAuSrt//oVWyQxzh9Ex+aOa8gyLxZkfg0mf3dgHn35ScNNgBW4K7MfmYCBETrEoJNRC6KlLGATzJwIWjVwGidrlV69oRCg9l+hCkNd5zAM1qRs/QNsIvjDVFClfIVtNSt0p89Me+0TToAVoggl/gK+CTXDIXvdzoT6xVGdN8rWar2QUCFTiwfboGBk4Ov1ILB3XxBsSflkQ4wh0DEPjZZMBO3Ig5ikE/0Qh/sk SpamDiagnosticOutput: 1:99 SpamDiagnosticMetadata: NSPM X-Microsoft-Exchange-Diagnostics: 1; BLUPR0501MB834; 20:DWjEQfNvfeCHNsJwp9WhKKIqwhZhSaMKZlt7wrvQlf9Wotm2mfPPpNTNsfjwdQ2vo1gsEfcMZ8lA21wOCbarqp/ebjrkuhNsG2NCFcH39RXgH4tuLsn6Zbt3Kw0SK+vvr65VCwMcl3Vg9CkMATclc96ABZBjdjF/EHZGPumpwto= X-MS-Exchange-CrossTenant-OriginalArrivalTime: 12 Jul 2016 19:37:39.7198 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-Transport-CrossTenantHeadersStamped: BLUPR0501MB834 Sender: linux-rdma-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-rdma@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This patch adds the ability to create, modify, query and destroy QPs. The PVRDMA device supports RC, UD and GSI QPs. Reviewed-by: Jorgen Hansen Reviewed-by: George Zhang Reviewed-by: Aditya Sarwade Reviewed-by: Bryan Tan Signed-off-by: Adit Ranadive --- drivers/infiniband/hw/pvrdma/pvrdma_qp.c | 976 +++++++++++++++++++++++++++++++ 1 file changed, 976 insertions(+) create mode 100644 drivers/infiniband/hw/pvrdma/pvrdma_qp.c diff --git a/drivers/infiniband/hw/pvrdma/pvrdma_qp.c b/drivers/infiniband/hw/pvrdma/pvrdma_qp.c new file mode 100644 index 0000000..18fd2c8 --- /dev/null +++ b/drivers/infiniband/hw/pvrdma/pvrdma_qp.c @@ -0,0 +1,976 @@ +/* + * Copyright (c) 2012-2016 VMware, Inc. All rights reserved. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of EITHER the GNU General Public License + * version 2 as published by the Free Software Foundation or the BSD + * 2-Clause License. This program is distributed in the hope that it + * will be useful, but WITHOUT ANY WARRANTY; WITHOUT EVEN THE IMPLIED + * WARRANTY OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. + * See the GNU General Public License version 2 for more details at + * http://www.gnu.org/licenses/old-licenses/gpl-2.0.en.html. + * + * You should have received a copy of the GNU General Public License + * along with this program available in the file COPYING in the main + * directory of this source tree. + * + * The BSD 2-Clause License + * + * Redistribution and use in source and binary forms, with or + * without modification, are permitted provided that the following + * conditions are met: + * + * - Redistributions of source code must retain the above + * copyright notice, this list of conditions and the following + * disclaimer. + * + * - Redistributions in binary form must reproduce the above + * copyright notice, this list of conditions and the following + * disclaimer in the documentation and/or other materials + * provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include +#include +#include +#include +#include +#include + +#include "pvrdma.h" +#include "pvrdma_user.h" + +static inline void get_cqs(struct pvrdma_qp *qp, struct pvrdma_cq **send_cq, + struct pvrdma_cq **recv_cq) +{ + *send_cq = to_vcq(qp->ibqp.send_cq); + *recv_cq = to_vcq(qp->ibqp.recv_cq); +} + +static void pvrdma_reset_qp(struct pvrdma_qp *qp) +{ + struct pvrdma_cq *scq, *rcq; + unsigned long flags; + + /* Clean up cqes */ + get_cqs(qp, &scq, &rcq); + spin_lock_irqsave(&scq->cq_lock, flags); + pvrdma_flush_cqe(qp, scq); + spin_unlock_irqrestore(&scq->cq_lock, flags); + if (rcq != scq) { + spin_lock_irqsave(&rcq->cq_lock, flags); + pvrdma_flush_cqe(qp, rcq); + spin_unlock_irqrestore(&rcq->cq_lock, flags); + } + + /* + * Reset queuepair. The checks are because usermode queuepairs won't + * have kernel ringstates. + */ + if (qp->rq.ring) { + atomic_set(&qp->rq.ring->cons_head, 0); + atomic_set(&qp->rq.ring->prod_tail, 0); + } + if (qp->sq.ring) { + atomic_set(&qp->sq.ring->cons_head, 0); + atomic_set(&qp->sq.ring->prod_tail, 0); + } +} + +static int pvrdma_set_rq_size(struct pvrdma_dev *dev, + struct ib_qp_cap *cap, + struct pvrdma_qp *qp) +{ + if (cap->max_recv_wr > dev->dsr->caps.max_qp_wr || + cap->max_recv_sge > dev->dsr->caps.max_sge) { + dev_warn(&dev->pdev->dev, "recv queue size invalid\n"); + return -EINVAL; + } + + qp->rq.wqe_cnt = roundup_pow_of_two(max(1U, cap->max_recv_wr)); + qp->rq.max_gs = roundup_pow_of_two(max(1U, cap->max_recv_sge)); + + /* Write back */ + cap->max_recv_wr = qp->rq.wqe_cnt; + cap->max_recv_sge = qp->rq.max_gs; + + qp->rq.wqe_size = roundup_pow_of_two(sizeof(struct pvrdma_rq_wqe_hdr) + + sizeof(struct ib_sge) * + qp->rq.max_gs); + qp->npages_recv = (qp->rq.wqe_cnt * qp->rq.wqe_size + PAGE_SIZE - 1) / + PAGE_SIZE; + + return 0; +} + +static int pvrdma_set_sq_size(struct pvrdma_dev *dev, struct ib_qp_cap *cap, + enum ib_qp_type type, struct pvrdma_qp *qp) +{ + if (cap->max_send_wr > dev->dsr->caps.max_qp_wr || + cap->max_send_sge > dev->dsr->caps.max_sge) { + dev_warn(&dev->pdev->dev, "send queue size invalid\n"); + return -EINVAL; + } + + qp->sq.wqe_cnt = roundup_pow_of_two(max(1U, cap->max_send_wr)); + qp->sq.max_gs = roundup_pow_of_two(max(1U, cap->max_send_sge)); + + /* Write back */ + cap->max_send_wr = qp->sq.wqe_cnt; + cap->max_send_sge = qp->sq.max_gs; + + qp->sq.wqe_size = roundup_pow_of_two(sizeof(struct pvrdma_sq_wqe_hdr) + + sizeof(struct ib_sge) * + qp->sq.max_gs); + /* Note: one extra page for the header. */ + qp->npages_send = 1 + (qp->sq.wqe_cnt * qp->sq.wqe_size + + PAGE_SIZE - 1) / PAGE_SIZE; + + return 0; +} + +/** + * pvrdma_create_qp - create queue pair + * @pd: protection domain + * @init_attr: queue pair attributes + * @udata: user data + * + * @return: the ib_qp pointer on success, otherwise returns an errno. + */ +struct ib_qp *pvrdma_create_qp(struct ib_pd *pd, + struct ib_qp_init_attr *init_attr, + struct ib_udata *udata) +{ + struct pvrdma_qp *qp; + struct pvrdma_dev *dev = to_vdev(pd->device); + struct pvrdma_cq *send_cq, *recv_cq; + union pvrdma_cmd_req req; + union pvrdma_cmd_resp rsp; + struct pvrdma_cmd_create_qp *cmd = &req.create_qp; + struct pvrdma_cmd_create_qp_resp *resp = &rsp.create_qp_resp; + struct pvrdma_create_qp ucmd; + unsigned long flags; + int ret; + + if (!atomic_add_unless(&dev->num_qps, 1, dev->dsr->caps.max_qp)) + return ERR_PTR(-EINVAL); + + if (init_attr->create_flags) { + dev_warn(&dev->pdev->dev, + "invalid create queuepair flags %#x\n", + init_attr->create_flags); + atomic_dec(&dev->num_qps); + return ERR_PTR(-EINVAL); + } + + if (init_attr->qp_type != IB_QPT_RC && + init_attr->qp_type != IB_QPT_UD && + init_attr->qp_type != IB_QPT_GSI) { + dev_warn(&dev->pdev->dev, "queuepair type %d not supported\n", + init_attr->qp_type); + atomic_dec(&dev->num_qps); + return ERR_PTR(-EINVAL); + } + + switch (init_attr->qp_type) { + case IB_QPT_GSI: + if (init_attr->port_num == 0 || + init_attr->port_num > pd->device->phys_port_cnt || + udata) { + dev_warn(&dev->pdev->dev, "invalid queuepair attrs\n"); + atomic_dec(&dev->num_qps); + return ERR_PTR(-EINVAL); + } + /* fall through */ + case IB_QPT_RC: + case IB_QPT_UD: + qp = kzalloc(sizeof(*qp), GFP_KERNEL); + if (!qp) { + atomic_dec(&dev->num_qps); + return ERR_PTR(-ENOMEM); + } + + spin_lock_init(&qp->sq.lock); + spin_lock_init(&qp->rq.lock); + mutex_init(&qp->mutex); + atomic_set(&qp->refcnt, 1); + init_waitqueue_head(&qp->wait); + + qp->state = IB_QPS_RESET; + + if (pd->uobject && udata) { + dev_dbg(&dev->pdev->dev, + "create queuepair from user space\n"); + + if (ib_copy_from_udata(&ucmd, udata, sizeof(ucmd))) { + ret = -EFAULT; + goto err_qp; + } + + /* set qp->sq.wqe_cnt, shift, buf_size.. */ + qp->rumem = ib_umem_get(pd->uobject->context, + ucmd.rbuf_addr, + ucmd.rbuf_size, 0, 0); + if (IS_ERR(qp->rumem)) { + ret = PTR_ERR(qp->rumem); + goto err_qp; + } + + qp->sumem = ib_umem_get(pd->uobject->context, + ucmd.sbuf_addr, + ucmd.sbuf_size, 0, 0); + if (IS_ERR(qp->sumem)) { + ib_umem_release(qp->rumem); + ret = PTR_ERR(qp->sumem); + goto err_qp; + } + + qp->npages_send = ib_umem_page_count(qp->sumem); + qp->npages_recv = ib_umem_page_count(qp->rumem); + qp->npages = qp->npages_send + qp->npages_recv; + } else { + qp->is_kernel = true; + + send_cq = to_vcq(init_attr->send_cq); + recv_cq = to_vcq(init_attr->recv_cq); + + ret = pvrdma_set_sq_size(to_vdev(pd->device), + &init_attr->cap, + init_attr->qp_type, qp); + if (ret) + goto err_qp; + + ret = pvrdma_set_rq_size(to_vdev(pd->device), + &init_attr->cap, qp); + if (ret) + goto err_qp; + + qp->npages = qp->npages_send + qp->npages_recv; + + /* Skip header page. */ + qp->sq.offset = PAGE_SIZE; + + /* Recv queue pages are after send pages. */ + qp->rq.offset = qp->npages_send * PAGE_SIZE; + } + + if (qp->npages < 0 || qp->npages > PVRDMA_PAGE_DIR_MAX_PAGES) { + dev_warn(&dev->pdev->dev, + "overflow pages in queuepair\n"); + goto err_umem; + } + + ret = pvrdma_page_dir_init(dev, &qp->pdir, qp->npages, + qp->is_kernel); + if (ret) { + dev_warn(&dev->pdev->dev, + "could not allocate page directory\n"); + goto err_umem; + } + + if (!qp->is_kernel) { + pvrdma_page_dir_insert_umem(&qp->pdir, qp->sumem, 0); + pvrdma_page_dir_insert_umem(&qp->pdir, qp->rumem, + qp->npages_send); + } else { + /* Ring state is always the first page. */ + qp->sq.ring = qp->pdir.pages[0]; + qp->rq.ring = &qp->sq.ring[1]; + } + break; + default: + atomic_dec(&dev->num_qps); + return ERR_PTR(-EINVAL); + } + + /* Not supported */ + init_attr->cap.max_inline_data = 0; + + memset(cmd, 0, sizeof(*cmd)); + cmd->hdr.cmd = PVRDMA_CMD_CREATE_QP; + cmd->pd_handle = to_vpd(pd)->pd_handle; + cmd->send_cq_handle = to_vcq(init_attr->send_cq)->cq_handle; + cmd->recv_cq_handle = to_vcq(init_attr->recv_cq)->cq_handle; + cmd->srq_handle = 0; + cmd->max_send_wr = init_attr->cap.max_send_wr; + cmd->max_recv_wr = init_attr->cap.max_recv_wr; + cmd->max_send_sge = init_attr->cap.max_send_sge; + cmd->max_recv_sge = init_attr->cap.max_recv_sge; + cmd->max_inline_data = init_attr->cap.max_inline_data; + cmd->sq_sig_all = (init_attr->sq_sig_type == IB_SIGNAL_ALL_WR) ? 1 : 0; + cmd->qp_type = ib_qp_type_to_pvrdma(init_attr->qp_type); + cmd->is_srq = 0; /* No support */ + cmd->lkey = 0; + cmd->access_flags = IB_ACCESS_LOCAL_WRITE; + cmd->total_chunks = qp->npages; + cmd->send_chunks = qp->npages_send - 1; + cmd->pdir_dma = qp->pdir.dir_dma; + + dev_dbg(&dev->pdev->dev, "create queuepair with %d, %d, %d, %d\n", + cmd->max_send_wr, cmd->max_recv_wr, cmd->max_send_sge, + cmd->max_recv_sge); + + ret = pvrdma_cmd_post(dev, &req, true, &rsp); + + if (ret < 0 || resp->hdr.ack != PVRDMA_CMD_CREATE_QP_RESP) { + dev_warn(&dev->pdev->dev, "could not create queuepair\n"); + goto err_pdir; + } + + /* max_send_wr/_recv_wr/_send_sge/_recv_sge/_inline_data */ + qp->qp_handle = resp->qpn; + qp->port = init_attr->port_num; + qp->ibqp.qp_num = resp->qpn; + spin_lock_irqsave(&dev->qp_tbl_lock, flags); + dev->qp_tbl[qp->qp_handle % dev->dsr->caps.max_qp] = qp; + spin_unlock_irqrestore(&dev->qp_tbl_lock, flags); + + return &qp->ibqp; + +err_pdir: + pvrdma_page_dir_cleanup(dev, &qp->pdir); +err_umem: + if (pd->uobject && udata) { + if (qp->rumem) + ib_umem_release(qp->rumem); + if (qp->sumem) + ib_umem_release(qp->sumem); + } +err_qp: + kfree(qp); + atomic_dec(&dev->num_qps); + + return ERR_PTR(ret); +} + +static void pvrdma_free_qp(struct pvrdma_qp *qp) +{ + struct pvrdma_dev *dev = to_vdev(qp->ibqp.device); + struct pvrdma_cq *scq; + struct pvrdma_cq *rcq; + unsigned long flags, flags1, flags2; + + /* In case cq is polling */ + get_cqs(qp, &scq, &rcq); + if ((uintptr_t)scq <= (uintptr_t)rcq) { + spin_lock_irqsave(&scq->cq_lock, flags1); + pvrdma_flush_cqe(qp, scq); + if (rcq != scq) { + spin_lock_irqsave(&rcq->cq_lock, flags2); + pvrdma_flush_cqe(qp, rcq); + } + } else { + spin_lock_irqsave(&rcq->cq_lock, flags2); + pvrdma_flush_cqe(qp, rcq); + spin_lock_irqsave(&scq->cq_lock, flags1); + pvrdma_flush_cqe(qp, scq); + } + + spin_lock_irqsave(&dev->qp_tbl_lock, flags); + dev->qp_tbl[qp->qp_handle] = NULL; + spin_unlock_irqrestore(&dev->qp_tbl_lock, flags); + + if ((uintptr_t)scq <= (uintptr_t)rcq) { + if (rcq != scq) + spin_unlock_irqrestore(&rcq->cq_lock, flags2); + spin_unlock_irqrestore(&scq->cq_lock, flags1); + } else { + spin_unlock_irqrestore(&scq->cq_lock, flags1); + spin_unlock_irqrestore(&rcq->cq_lock, flags2); + } + + atomic_dec(&qp->refcnt); + wait_event(qp->wait, !atomic_read(&qp->refcnt)); + + pvrdma_page_dir_cleanup(dev, &qp->pdir); + + kfree(qp); + + atomic_dec(&dev->num_qps); +} + +/** + * pvrdma_destroy_qp - destroy a queue pair + * @qp: the queue pair to destroy + * + * @return: 0 on success. + */ +int pvrdma_destroy_qp(struct ib_qp *qp) +{ + struct pvrdma_qp *vqp = to_vqp(qp); + union pvrdma_cmd_req req; + union pvrdma_cmd_resp rsp; + struct pvrdma_cmd_destroy_qp *cmd = &req.destroy_qp; + int ret; + + memset(cmd, 0, sizeof(*cmd)); + cmd->hdr.cmd = PVRDMA_CMD_DESTROY_QP; + cmd->qp_handle = vqp->qp_handle; + + ret = pvrdma_cmd_post(to_vdev(qp->device), &req, false, &rsp); + if (ret < 0) { + struct pvrdma_dev *dev = to_vdev(qp->device); + + dev_warn(&dev->pdev->dev, "destroy queuepair failed\n"); + } + + pvrdma_free_qp(vqp); + + return 0; +} + +/** + * pvrdma_modify_qp - modify queue pair attributes + * @ibqp: the queue pair + * @attr: the new queue pair's attributes + * @attr_mask: attributes mask + * @udata: user data + * + * @returns 0 on success, otherwise returns an errno. + */ +int pvrdma_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr, + int attr_mask, struct ib_udata *udata) +{ + struct pvrdma_dev *dev = to_vdev(ibqp->device); + struct pvrdma_qp *qp = to_vqp(ibqp); + union pvrdma_cmd_req req; + union pvrdma_cmd_resp rsp; + struct pvrdma_cmd_modify_qp *cmd = &req.modify_qp; + int cur_state, next_state; + int ret; + + /* Sanity checking. Should need lock here */ + mutex_lock(&qp->mutex); + cur_state = (attr_mask & IB_QP_CUR_STATE) ? attr->cur_qp_state : + qp->state; + next_state = (attr_mask & IB_QP_STATE) ? attr->qp_state : cur_state; + + if (!ib_modify_qp_is_ok(cur_state, next_state, ibqp->qp_type, + attr_mask, IB_LINK_LAYER_ETHERNET)) { + ret = -EINVAL; + goto out; + } + + if (attr_mask & IB_QP_PORT) { + if (attr->port_num == 0 || + attr->port_num > ibqp->device->phys_port_cnt) { + ret = -EINVAL; + goto out; + } + } + + if (attr_mask & IB_QP_MIN_RNR_TIMER) { + if (attr->min_rnr_timer > 31) { + ret = -EINVAL; + goto out; + } + } + + if (attr_mask & IB_QP_PKEY_INDEX) { + if (attr->pkey_index >= dev->dsr->caps.max_pkeys) { + ret = -EINVAL; + goto out; + } + } + + if (attr_mask & IB_QP_QKEY) + qp->qkey = attr->qkey; + + if (cur_state == next_state && cur_state == IB_QPS_RESET) { + ret = 0; + goto out; + } + + switch (next_state) { + case IB_QPS_RESET: + case IB_QPS_INIT: + case IB_QPS_RTR: + case IB_QPS_RTS: + case IB_QPS_SQD: + case IB_QPS_SQE: + case IB_QPS_ERR: + default: + qp->state = next_state; + memset(cmd, 0, sizeof(*cmd)); + cmd->hdr.cmd = PVRDMA_CMD_MODIFY_QP; + cmd->qp_handle = qp->qp_handle; + cmd->attr_mask = ib_qp_attr_mask_to_pvrdma(attr_mask); + cmd->attrs.qp_state = ib_qp_state_to_pvrdma(attr->qp_state); + cmd->attrs.cur_qp_state = + ib_qp_state_to_pvrdma(attr->cur_qp_state); + cmd->attrs.path_mtu = ib_mtu_to_pvrdma(attr->path_mtu); + cmd->attrs.path_mig_state = + ib_mig_state_to_pvrdma(attr->path_mig_state); + cmd->attrs.qkey = attr->qkey; + cmd->attrs.rq_psn = attr->rq_psn; + cmd->attrs.sq_psn = attr->sq_psn; + cmd->attrs.dest_qp_num = attr->dest_qp_num; + cmd->attrs.qp_access_flags = + ib_access_flags_to_pvrdma(attr->qp_access_flags); + cmd->attrs.pkey_index = attr->pkey_index; + cmd->attrs.alt_pkey_index = attr->alt_pkey_index; + cmd->attrs.en_sqd_async_notify = attr->en_sqd_async_notify; + cmd->attrs.sq_draining = attr->sq_draining; + cmd->attrs.max_rd_atomic = attr->max_rd_atomic; + cmd->attrs.max_dest_rd_atomic = attr->max_dest_rd_atomic; + cmd->attrs.min_rnr_timer = attr->min_rnr_timer; + cmd->attrs.port_num = attr->port_num; + cmd->attrs.timeout = attr->timeout; + cmd->attrs.retry_cnt = attr->retry_cnt; + cmd->attrs.rnr_retry = attr->rnr_retry; + cmd->attrs.alt_port_num = attr->alt_port_num; + cmd->attrs.alt_timeout = attr->alt_timeout; + ib_qp_cap_to_pvrdma(&attr->cap, &cmd->attrs.cap); + ib_ah_attr_to_pvrdma(&attr->ah_attr, &cmd->attrs.ah_attr); + ib_ah_attr_to_pvrdma(&attr->alt_ah_attr, + &cmd->attrs.alt_ah_attr); + ret = pvrdma_cmd_post(dev, &req, true, &rsp); + if (ret < 0 || rsp.hdr.ack != PVRDMA_CMD_MODIFY_QP_RESP || + rsp.hdr.err > 0) { + dev_warn(&dev->pdev->dev, + "could not modify queuepair\n"); + if (ret == 0) { + if (rsp.hdr.ack != PVRDMA_CMD_MODIFY_QP_RESP) + ret = -EINVAL; + else + ret = rsp.hdr.err; + } + } + + /* Fall through */ + break; + } + + if (ret == 0 && next_state == IB_QPS_RESET) + pvrdma_reset_qp(qp); + +out: + mutex_unlock(&qp->mutex); + + return ret; +} + +static inline void *get_sq_wqe(struct pvrdma_qp *qp, int n) +{ + return pvrdma_page_dir_get_ptr(&qp->pdir, + qp->sq.offset + n * qp->sq.wqe_size); +} + +static inline void *get_rq_wqe(struct pvrdma_qp *qp, int n) +{ + return pvrdma_page_dir_get_ptr(&qp->pdir, + qp->rq.offset + n * qp->rq.wqe_size); +} + +static int set_reg_seg(struct pvrdma_sq_wqe_hdr *wqe_hdr, struct ib_reg_wr *wr) +{ + struct pvrdma_user_mr *mr = to_vmr(wr->mr); + + wqe_hdr->wr.fast_reg.iova_start = mr->ibmr.iova; + wqe_hdr->wr.fast_reg.pl_pdir_dma = mr->pdir.dir_dma; + wqe_hdr->wr.fast_reg.page_shift = mr->page_shift; + wqe_hdr->wr.fast_reg.page_list_len = mr->npages; + wqe_hdr->wr.fast_reg.length = mr->ibmr.length; + wqe_hdr->wr.fast_reg.access_flags = wr->access; + wqe_hdr->wr.fast_reg.rkey = wr->key; + + return pvrdma_page_dir_insert_page_list(&mr->pdir, mr->pages, + mr->npages); +} + +/** + * pvrdma_post_send - post send work request entries on a QP + * @ibqp: the QP + * @wr: work request list to post + * @bad_wr: the first bad WR returned + * + * @return: 0 on success, otherwise errno returned. + */ +int pvrdma_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr, + struct ib_send_wr **bad_wr) +{ + struct pvrdma_qp *qp = to_vqp(ibqp); + struct pvrdma_dev *dev = to_vdev(ibqp->device); + unsigned long flags; + struct pvrdma_sq_wqe_hdr *wqe_hdr; + struct ib_sge *sge; + int i, index; + int nreq; + int ret; + + /* + * In states lower than RTS, we can fail immediately. In other states, + * just post and let the device figure it out. + */ + if (qp->state < IB_QPS_RTS) { + *bad_wr = wr; + return -EINVAL; + } + + spin_lock_irqsave(&qp->sq.lock, flags); + + index = pvrdma_idx(&qp->sq.ring->prod_tail, qp->sq.wqe_cnt); + for (nreq = 0; wr; nreq++, wr = wr->next) { + unsigned int tail; + + if (unlikely(!pvrdma_idx_ring_has_space( + qp->sq.ring, qp->sq.wqe_cnt, &tail))) { + dev_warn(&dev->pdev->dev, "send queue is full\n"); + *bad_wr = wr; + ret = -ENOMEM; + goto out; + } + + if (unlikely(wr->num_sge > qp->sq.max_gs || wr->num_sge < 0)) { + dev_warn(&dev->pdev->dev, "send SGE overflow\n"); + *bad_wr = wr; + ret = -EINVAL; + goto out; + } + + if (unlikely(wr->opcode < 0)) { + dev_warn(&dev->pdev->dev, "invalid send opcode\n"); + *bad_wr = wr; + ret = -EINVAL; + goto out; + } + + /* + * Only support UD, RC. + * Need to check opcode table for thorough checking. + * opcode _UD _UC _RC + * _SEND x x x + * _SEND_WITH_IMM x x x + * _RDMA_WRITE x x + * _RDMA_WRITE_WITH_IMM x x + * _LOCAL_INV x x + * _SEND_WITH_INV x x + * _RDMA_READ x + * _ATOMIC_CMP_AND_SWP x + * _ATOMIC_FETCH_AND_ADD x + * _MASK_ATOMIC_CMP_AND_SWP x + * _MASK_ATOMIC_FETCH_AND_ADD x + * _REG_MR x + * + */ + if (qp->ibqp.qp_type != IB_QPT_UD && + qp->ibqp.qp_type != IB_QPT_RC && + wr->opcode != IB_WR_SEND) { + dev_warn(&dev->pdev->dev, + "unsupported queuepair type\n"); + *bad_wr = wr; + ret = -EINVAL; + goto out; + } else if (qp->ibqp.qp_type == IB_QPT_UD || + qp->ibqp.qp_type == IB_QPT_GSI) { + if (wr->opcode != IB_WR_SEND && + wr->opcode != IB_WR_SEND_WITH_IMM) { + dev_warn(&dev->pdev->dev, + "invalid send opcode\n"); + *bad_wr = wr; + ret = -EINVAL; + goto out; + } + } + + wqe_hdr = (struct pvrdma_sq_wqe_hdr *)get_sq_wqe(qp, index); + memset(wqe_hdr, 0, sizeof(*wqe_hdr)); + wqe_hdr->wr_id = wr->wr_id; + wqe_hdr->num_sge = wr->num_sge; + wqe_hdr->opcode = ib_wr_opcode_to_pvrdma(wr->opcode); + wqe_hdr->send_flags = ib_send_flags_to_pvrdma(wr->send_flags); + if (wr->opcode == IB_WR_SEND_WITH_IMM || + wr->opcode == IB_WR_RDMA_WRITE_WITH_IMM) + wqe_hdr->ex.imm_data = wr->ex.imm_data; + + switch (qp->ibqp.qp_type) { + case IB_QPT_GSI: + case IB_QPT_UD: + if (unlikely(!ud_wr(wr)->ah)) { + dev_warn(&dev->pdev->dev, + "invalid address handle\n"); + *bad_wr = wr; + ret = -EINVAL; + goto out; + } + + /* + * Use qkey from qp context if high order bit set, + * otherwise from work request. + */ + wqe_hdr->wr.ud.remote_qpn = ud_wr(wr)->remote_qpn; + wqe_hdr->wr.ud.remote_qkey = + ud_wr(wr)->remote_qkey & 0x80000000 ? + qp->qkey : ud_wr(wr)->remote_qkey; + wqe_hdr->wr.ud.av = to_vah(ud_wr(wr)->ah)->av; + + break; + case IB_QPT_RC: + switch (wr->opcode) { + case IB_WR_RDMA_READ: + case IB_WR_RDMA_WRITE: + case IB_WR_RDMA_WRITE_WITH_IMM: + wqe_hdr->wr.rdma.remote_addr = + rdma_wr(wr)->remote_addr; + wqe_hdr->wr.rdma.rkey = rdma_wr(wr)->rkey; + break; + case IB_WR_LOCAL_INV: + case IB_WR_SEND_WITH_INV: + wqe_hdr->ex.invalidate_rkey = + wr->ex.invalidate_rkey; + break; + case IB_WR_ATOMIC_CMP_AND_SWP: + case IB_WR_ATOMIC_FETCH_AND_ADD: + wqe_hdr->wr.atomic.remote_addr = + atomic_wr(wr)->remote_addr; + wqe_hdr->wr.atomic.rkey = atomic_wr(wr)->rkey; + wqe_hdr->wr.atomic.compare_add = + atomic_wr(wr)->compare_add; + if (wr->opcode == IB_WR_ATOMIC_CMP_AND_SWP) + wqe_hdr->wr.atomic.swap = + atomic_wr(wr)->swap; + break; + case IB_WR_REG_MR: + ret = set_reg_seg(wqe_hdr, reg_wr(wr)); + if (ret < 0) { + dev_warn(&dev->pdev->dev, + "Failed to set fast register work request\n"); + *bad_wr = wr; + goto out; + } + break; + default: + break; + } + + break; + default: + dev_warn(&dev->pdev->dev, "invalid queuepair type\n"); + ret = -EINVAL; + *bad_wr = wr; + goto out; + } + + sge = (struct ib_sge *)(wqe_hdr + 1); + for (i = 0; i < wr->num_sge; i++) { + /* Need to check wqe_size 0 or max size */ + sge->addr = wr->sg_list[i].addr; + sge->length = wr->sg_list[i].length; + sge->lkey = wr->sg_list[i].lkey; + sge++; + } + + /* Make sure wqe is written before index update */ + smp_wmb(); + + index++; + if (unlikely(index >= qp->sq.wqe_cnt)) + index = 0; + /* Update shared sq ring */ + pvrdma_idx_ring_inc(&qp->sq.ring->prod_tail, + qp->sq.wqe_cnt); + } + + ret = 0; + +out: + spin_unlock_irqrestore(&qp->sq.lock, flags); + + if (!ret) + writel(cpu_to_le32(PVRDMA_UAR_QP_SEND | qp->qp_handle), + dev->driver_uar.map + PVRDMA_UAR_QP_OFFSET); + + return ret; +} + +/** + * pvrdma_post_receive - post receive work request entries on a QP + * @ibqp: the QP + * @wr: the work request list to post + * @bad_wr: the first bad WR returned + * + * @return: 0 on success, otherwise errno returned. + */ +int pvrdma_post_recv(struct ib_qp *ibqp, struct ib_recv_wr *wr, + struct ib_recv_wr **bad_wr) +{ + struct pvrdma_dev *dev = to_vdev(ibqp->device); + unsigned long flags; + struct pvrdma_qp *qp = to_vqp(ibqp); + struct pvrdma_rq_wqe_hdr *wqe_hdr; + struct ib_sge *sge; + int index, nreq; + int ret = 0; + int i; + + /* + * In the RESET state, we can fail immediately. For other states, + * just post and let the device figure it out. + */ + if (qp->state == IB_QPS_RESET) { + *bad_wr = wr; + return -EINVAL; + } + + spin_lock_irqsave(&qp->rq.lock, flags); + + index = pvrdma_idx(&qp->rq.ring->prod_tail, qp->rq.wqe_cnt); + for (nreq = 0; wr; nreq++, wr = wr->next) { + unsigned int tail; + + if (unlikely(wr->num_sge > qp->rq.max_gs || + wr->num_sge < 0)) { + ret = -EINVAL; + *bad_wr = wr; + dev_warn(&dev->pdev->dev, "recv SGE overflow\n"); + goto out; + } + + if (unlikely(!pvrdma_idx_ring_has_space( + qp->rq.ring, qp->rq.wqe_cnt, &tail))) { + ret = -ENOMEM; + *bad_wr = wr; + dev_warn(&dev->pdev->dev, "recv queue full\n"); + goto out; + } + + wqe_hdr = (struct pvrdma_rq_wqe_hdr *)get_rq_wqe(qp, index); + wqe_hdr->wr_id = wr->wr_id; + wqe_hdr->num_sge = wr->num_sge; + wqe_hdr->total_len = 0; + + sge = (struct ib_sge *)(wqe_hdr + 1); + for (i = 0; i < wr->num_sge; i++) { + sge->addr = wr->sg_list[i].addr; + sge->length = wr->sg_list[i].length; + sge->lkey = wr->sg_list[i].lkey; + sge++; + } + + /* Make sure wqe is written before index update */ + smp_wmb(); + + index++; + if (unlikely(index >= qp->rq.wqe_cnt)) + index = 0; + /* Update shared rq ring */ + pvrdma_idx_ring_inc(&qp->rq.ring->prod_tail, + qp->rq.wqe_cnt); + } + + spin_unlock_irqrestore(&qp->rq.lock, flags); + + writel(cpu_to_le32(PVRDMA_UAR_QP_RECV | qp->qp_handle), + dev->driver_uar.map + PVRDMA_UAR_QP_OFFSET); + + return ret; + +out: + spin_unlock_irqrestore(&qp->rq.lock, flags); + + return ret; +} + +/** + * pvrdma_query_qp - query a queue pair's attributes + * @ibqp: the queue pair to query + * @attr: the queue pair's attributes + * @attr_mask: attributes mask + * @init_attr: initial queue pair attributes + * + * @returns 0 on success, otherwise returns an errno. + */ +int pvrdma_query_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr, + int attr_mask, struct ib_qp_init_attr *init_attr) +{ + struct pvrdma_dev *dev = to_vdev(ibqp->device); + struct pvrdma_qp *qp = to_vqp(ibqp); + union pvrdma_cmd_req req; + union pvrdma_cmd_resp rsp; + struct pvrdma_cmd_query_qp *cmd = &req.query_qp; + struct pvrdma_cmd_query_qp_resp *resp = &rsp.query_qp_resp; + int ret = 0; + + mutex_lock(&qp->mutex); + + if (qp->state == IB_QPS_RESET) { + attr->qp_state = IB_QPS_RESET; + goto out; + } + + memset(cmd, 0, sizeof(*cmd)); + cmd->hdr.cmd = PVRDMA_CMD_QUERY_QP; + cmd->qp_handle = qp->qp_handle; + cmd->attr_mask = ib_qp_attr_mask_to_pvrdma(attr_mask); + + ret = pvrdma_cmd_post(dev, &req, true, &rsp); + if (ret < 0 || resp->hdr.ack != PVRDMA_CMD_QUERY_QP_RESP) { + dev_warn(&dev->pdev->dev, "could not query queuepair\n"); + ret = -EINVAL; + goto out; + } + + attr->qp_state = pvrdma_qp_state_to_ib(resp->attrs.qp_state); + attr->cur_qp_state = + pvrdma_qp_state_to_ib(resp->attrs.cur_qp_state); + attr->path_mtu = pvrdma_mtu_to_ib(resp->attrs.path_mtu); + attr->path_mig_state = + pvrdma_mig_state_to_ib(resp->attrs.path_mig_state); + attr->qkey = resp->attrs.qkey; + attr->rq_psn = resp->attrs.rq_psn; + attr->sq_psn = resp->attrs.sq_psn; + attr->dest_qp_num = resp->attrs.dest_qp_num; + attr->qp_access_flags = + pvrdma_access_flags_to_ib(resp->attrs.qp_access_flags); + attr->pkey_index = resp->attrs.pkey_index; + attr->alt_pkey_index = resp->attrs.alt_pkey_index; + attr->en_sqd_async_notify = resp->attrs.en_sqd_async_notify; + attr->sq_draining = resp->attrs.sq_draining; + attr->max_rd_atomic = resp->attrs.max_rd_atomic; + attr->max_dest_rd_atomic = resp->attrs.max_dest_rd_atomic; + attr->min_rnr_timer = resp->attrs.min_rnr_timer; + attr->port_num = resp->attrs.port_num; + attr->timeout = resp->attrs.timeout; + attr->retry_cnt = resp->attrs.retry_cnt; + attr->rnr_retry = resp->attrs.rnr_retry; + attr->alt_port_num = resp->attrs.alt_port_num; + attr->alt_timeout = resp->attrs.alt_timeout; + pvrdma_qp_cap_to_ib(&resp->attrs.cap, &attr->cap); + pvrdma_ah_attr_to_ib(&resp->attrs.ah_attr, &attr->ah_attr); + pvrdma_ah_attr_to_ib(&resp->attrs.alt_ah_attr, &attr->alt_ah_attr); + + qp->state = attr->qp_state; + + ret = 0; + +out: + attr->cur_qp_state = attr->qp_state; + + init_attr->event_handler = qp->ibqp.event_handler; + init_attr->qp_context = qp->ibqp.qp_context; + init_attr->send_cq = qp->ibqp.send_cq; + init_attr->recv_cq = qp->ibqp.recv_cq; + init_attr->srq = qp->ibqp.srq; + init_attr->xrcd = NULL; + init_attr->cap = attr->cap; + init_attr->sq_sig_type = 0; + init_attr->qp_type = qp->ibqp.qp_type; + init_attr->create_flags = 0; + init_attr->port_num = qp->port; + + mutex_unlock(&qp->mutex); + return ret; +}