From patchwork Wed Mar 15 10:37:32 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Devesh Sharma X-Patchwork-Id: 9625231 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 3009F60522 for ; Wed, 15 Mar 2017 10:38:25 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 336D628558 for ; Wed, 15 Mar 2017 10:38:25 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 285D1285FC; Wed, 15 Mar 2017 10:38:25 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI,T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id C104A285F4 for ; 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bh=GX/XSaAcAQk63gG7e8RoLXPlwxKh/vZ2wnkQ2duMjbw=; b=rEtpeaDXdzuM9SZannX+HMwpmFY398GVYeMUdwtgJTHDwPnwTPlp76V2BFmc61eFE0 8iGzZI/3mn7+Xl/RRsxMAhNbiX++s+Ce8tPOuH/53QzOC02B9uie0KRN4PrTA5bQsqfP 7o81gGkcekclqVTbjKF1XjLmsBzb2JCSQB8CWtGWxRZKSre8TjkvVhunp15h0zmO7GOu 4Qh82L0Hmic76dKMWTCawIRAoWh5DGhgiUe9xwhf3OEwUCly6COqJRSFYvO7lDdFP6/w +DvXV7QIlpobVvKMe4eBPatIpufE3aIZZd0W07dz1sGcIAs6no+ZRWOxhA7lk/FWk2YU tqBA== X-Gm-Message-State: AFeK/H1cyCZL1RKYztG2MLY6XDs59J5hTA8/I+iktkhxwCy0t2fET/lRDDHGGSruhBPqVRD3 X-Received: by 10.28.65.196 with SMTP id o187mr18995899wma.9.1489574293393; Wed, 15 Mar 2017 03:38:13 -0700 (PDT) Received: from neo00-el73.iig.avagotech.net ([192.19.239.250]) by smtp.gmail.com with ESMTPSA id 63sm3240365wmg.22.2017.03.15.03.38.11 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 15 Mar 2017 03:38:12 -0700 (PDT) From: Devesh Sharma To: linux-rdma@vger.kernel.org Subject: [rdma-core v3 8/9] libbnxt_re: Add support for atomic operations Date: Wed, 15 Mar 2017 06:37:32 -0400 Message-Id: <1489574253-20300-9-git-send-email-devesh.sharma@broadcom.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1489574253-20300-1-git-send-email-devesh.sharma@broadcom.com> References: <1489574253-20300-1-git-send-email-devesh.sharma@broadcom.com> Sender: linux-rdma-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-rdma@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This patch adds support for compare-and-swap and fetch-and-add atomic operations in user library. v1->v2 -- Fixed the missing "break" -- Changed macros to inline function Signed-off-by: Sriharsha Basavapatna Signed-off-by: Somnath Kotur Signed-off-by: Selvin Xavier Signed-off-by: Devesh Sharma --- providers/bnxt_re/bnxt_re-abi.h | 3 ++- providers/bnxt_re/main.h | 8 +++++- providers/bnxt_re/memory.h | 10 +++++++ providers/bnxt_re/verbs.c | 58 +++++++++++++++++++++++++++++++++++------ 4 files changed, 69 insertions(+), 10 deletions(-) diff --git a/providers/bnxt_re/bnxt_re-abi.h b/providers/bnxt_re/bnxt_re-abi.h index 581e1b7..557221b 100644 --- a/providers/bnxt_re/bnxt_re-abi.h +++ b/providers/bnxt_re/bnxt_re-abi.h @@ -54,7 +54,8 @@ enum bnxt_re_wr_opcode { BNXT_RE_WR_OPCD_ATOMIC_FA = 0x0B, BNXT_RE_WR_OPCD_LOC_INVAL = 0x0C, BNXT_RE_WR_OPCD_BIND = 0x0E, - BNXT_RE_WR_OPCD_RECV = 0x80 + BNXT_RE_WR_OPCD_RECV = 0x80, + BNXT_RE_WR_OPCD_INVAL = 0xFF }; enum bnxt_re_wr_flags { diff --git a/providers/bnxt_re/main.h b/providers/bnxt_re/main.h index 9d99c64..a417328 100644 --- a/providers/bnxt_re/main.h +++ b/providers/bnxt_re/main.h @@ -236,9 +236,15 @@ static inline uint8_t bnxt_re_ibv_to_bnxt_wr_opcd(uint8_t ibv_opcd) case IBV_WR_RDMA_READ: bnxt_opcd = BNXT_RE_WR_OPCD_RDMA_READ; break; + case IBV_WR_ATOMIC_CMP_AND_SWP: + bnxt_opcd = BNXT_RE_WR_OPCD_ATOMIC_CS; + break; + case IBV_WR_ATOMIC_FETCH_AND_ADD: + bnxt_opcd = BNXT_RE_WR_OPCD_ATOMIC_FA; + break; /* TODO: Add other opcodes */ default: - bnxt_opcd = 0xFF; + bnxt_opcd = BNXT_RE_WR_OPCD_INVAL; break; }; diff --git a/providers/bnxt_re/memory.h b/providers/bnxt_re/memory.h index debb31a..d7e6a92 100644 --- a/providers/bnxt_re/memory.h +++ b/providers/bnxt_re/memory.h @@ -83,6 +83,16 @@ static inline void iowrite32(__u32 *dst, uint32_t *src) *(volatile __u32 *)dst = *src; } +static inline __u32 upper_32_bits(uint64_t n) +{ + return (__u32)((n >> 16) >> 16); +} + +static inline __u32 lower_32_bits(uint64_t n) +{ + return (__u32)(n & 0xFFFFFFFFUL); +} + /* Basic queue operation */ static inline uint32_t bnxt_re_is_que_full(struct bnxt_re_queue *que) { diff --git a/providers/bnxt_re/verbs.c b/providers/bnxt_re/verbs.c index e60010d..85d77cd 100644 --- a/providers/bnxt_re/verbs.c +++ b/providers/bnxt_re/verbs.c @@ -1068,6 +1068,9 @@ static int bnxt_re_build_send_sqe(struct bnxt_re_qp *qp, void *wqe, /* Fill Header */ opcode = bnxt_re_ibv_to_bnxt_wr_opcd(wr->opcode); + if (opcode == BNXT_RE_WR_OPCD_INVAL) + return -EINVAL; + hdr->rsv_ws_fl_wt |= (opcode & BNXT_RE_HDR_WT_MASK); if (is_inline) { @@ -1116,6 +1119,44 @@ static int bnxt_re_build_rdma_sqe(struct bnxt_re_qp *qp, void *wqe, return len; } +static int bnxt_re_build_cns_sqe(struct bnxt_re_qp *qp, void *wqe, + struct ibv_send_wr *wr) +{ + struct bnxt_re_bsqe *hdr = wqe; + struct bnxt_re_atomic *sqe = ((void *)wqe + + sizeof(struct bnxt_re_bsqe)); + int len; + + len = bnxt_re_build_send_sqe(qp, wqe, wr, false); + hdr->key_immd = wr->wr.atomic.rkey; + sqe->rva_lo = lower_32_bits(wr->wr.atomic.remote_addr); + sqe->rva_hi = upper_32_bits(wr->wr.atomic.remote_addr); + sqe->cmp_dt_lo = lower_32_bits(wr->wr.atomic.compare_add); + sqe->cmp_dt_hi = upper_32_bits(wr->wr.atomic.compare_add); + sqe->swp_dt_lo = lower_32_bits(wr->wr.atomic.swap); + sqe->swp_dt_hi = upper_32_bits(wr->wr.atomic.swap); + + return len; +} + +static int bnxt_re_build_fna_sqe(struct bnxt_re_qp *qp, void *wqe, + struct ibv_send_wr *wr) +{ + struct bnxt_re_bsqe *hdr = wqe; + struct bnxt_re_atomic *sqe = ((void *)wqe + + sizeof(struct bnxt_re_bsqe)); + int len; + + len = bnxt_re_build_send_sqe(qp, wqe, wr, false); + hdr->key_immd = wr->wr.atomic.rkey; + sqe->rva_lo = lower_32_bits(wr->wr.atomic.remote_addr); + sqe->rva_hi = upper_32_bits(wr->wr.atomic.remote_addr); + sqe->cmp_dt_lo = lower_32_bits(wr->wr.atomic.compare_add); + sqe->cmp_dt_hi = upper_32_bits(wr->wr.atomic.compare_add); + + return len; +} + int bnxt_re_post_send(struct ibv_qp *ibvqp, struct ibv_send_wr *wr, struct ibv_send_wr **bad) { @@ -1169,27 +1210,28 @@ int bnxt_re_post_send(struct ibv_qp *ibvqp, struct ibv_send_wr *wr, else bytes = bnxt_re_build_send_sqe(qp, sqe, wr, is_inline); - if (bytes < 0) - ret = (bytes == -EINVAL) ? EINVAL : ENOMEM; break; case IBV_WR_RDMA_WRITE_WITH_IMM: hdr->key_immd = wr->imm_data; case IBV_WR_RDMA_WRITE: bytes = bnxt_re_build_rdma_sqe(qp, sqe, wr, is_inline); - if (bytes < 0) - ret = ENOMEM; break; case IBV_WR_RDMA_READ: bytes = bnxt_re_build_rdma_sqe(qp, sqe, wr, false); - if (bytes < 0) - ret = ENOMEM; + break; + case IBV_WR_ATOMIC_CMP_AND_SWP: + bytes = bnxt_re_build_cns_sqe(qp, sqe, wr); + break; + case IBV_WR_ATOMIC_FETCH_AND_ADD: + bytes = bnxt_re_build_fna_sqe(qp, sqe, wr); break; default: - ret = EINVAL; + bytes = -EINVAL; break; } - if (ret) { + if (bytes < 0) { + ret = (bytes == -EINVAL) ? EINVAL : ENOMEM; *bad = wr; break; }