From patchwork Wed Jun 21 17:18:21 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Selvin Xavier X-Patchwork-Id: 9802365 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id B4A1D60329 for ; Wed, 21 Jun 2017 17:19:55 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 215D42853C for ; Wed, 21 Jun 2017 17:19:52 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 15C072860F; Wed, 21 Jun 2017 17:19:52 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI,T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 9295F2853C for ; Wed, 21 Jun 2017 17:19:51 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752150AbdFURTu (ORCPT ); Wed, 21 Jun 2017 13:19:50 -0400 Received: from mail-wr0-f180.google.com ([209.85.128.180]:33617 "EHLO mail-wr0-f180.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751126AbdFURTu (ORCPT ); Wed, 21 Jun 2017 13:19:50 -0400 Received: by mail-wr0-f180.google.com with SMTP id r103so143712356wrb.0 for ; Wed, 21 Jun 2017 10:19:49 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=broadcom.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=1E4tS8ZlYu/m1+ssW15mlJV3la5hYwJkQzkNtzv8Sgg=; b=FiBXNSmm4+U27/VaPVmSSlC3+L2xMAr4qAwVOKWX5AFocnveA013IxlPsEvm6topLq keuqszaohAubvCvJArHsmkP/syuo/OKTeLUUld14P8PDDnYe2q6cDPeCqAkoMBu0DHUn LaXRsPmJ2x8Ev5WZ5ljpxaaukG7pZ51jzdLBM= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=1E4tS8ZlYu/m1+ssW15mlJV3la5hYwJkQzkNtzv8Sgg=; b=WaMXpP3+NGwD2E8jpWC9+ItKHRjYVVErNALBX5YlNefzzubk6yRxVWTm1fsKXdRYVo NH96t9CfHPvEVX4lpXvzGI8bdDeIsmRl1BId11S3zlGYTTFPuRwrQBp5z0UrM4okPkSr ebd/4NUDHvM2pHmeWQH7kQ82SbZHilofZTzGbxMyS2xUQ0tjQDHkcC8S0onIBW4H/lHW 5xA63uht/qyXMwWKpAPc0sysaPdv/5tDB8GxQ8h6+n0Yu5Kp8wMZbUJRFmxibaek5Yj3 kUxI+d9JXuh91QxeQFdIros6AEy4JHg0fcFhuM8UhystHzCzRFh0YLT4PTraO/oY2vVp YoFg== X-Gm-Message-State: AKS2vOxzEJMywe8A5wS6aBVQMr7qejXOyWezJ2nPFPITlzYrJFTN4uXZ fdbiRlRM+hzMFMaU X-Received: by 10.28.236.134 with SMTP id h6mr7352243wmi.1.1498065588722; Wed, 21 Jun 2017 10:19:48 -0700 (PDT) Received: from dhcp-10-192-206-197.iig.avagotech.net ([192.19.239.250]) by smtp.gmail.com with ESMTPSA id n64sm7446955wmd.24.2017.06.21.10.19.45 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 21 Jun 2017 10:19:48 -0700 (PDT) From: Selvin Xavier To: dledford@redhat.com Cc: linux-rdma@vger.kernel.org, Devesh Sharma , Selvin Xavier Subject: [PATCH for-next 10/13] RDMA/bnxt_re: Enable atomics only if host bios supports Date: Wed, 21 Jun 2017 10:18:21 -0700 Message-Id: <1498065504-27902-11-git-send-email-selvin.xavier@broadcom.com> X-Mailer: git-send-email 2.5.5 In-Reply-To: <1498065504-27902-1-git-send-email-selvin.xavier@broadcom.com> References: <1498065504-27902-1-git-send-email-selvin.xavier@broadcom.com> Sender: linux-rdma-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-rdma@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Devesh Sharma Driver shall check if the host system bios has enabled Atomic operations capability in PCI Device Control 2 register of the pci-device. Expose the ATOMIC_HCA flag only if the Atomic operations capability is set. Signed-off-by: Devesh Sharma Signed-off-by: Selvin Xavier --- drivers/infiniband/hw/bnxt_re/ib_verbs.c | 6 ++++-- drivers/infiniband/hw/bnxt_re/qplib_sp.c | 14 ++++++++++++++ drivers/infiniband/hw/bnxt_re/qplib_sp.h | 3 +++ 3 files changed, 21 insertions(+), 2 deletions(-) diff --git a/drivers/infiniband/hw/bnxt_re/ib_verbs.c b/drivers/infiniband/hw/bnxt_re/ib_verbs.c index e7d667f..5653467 100644 --- a/drivers/infiniband/hw/bnxt_re/ib_verbs.c +++ b/drivers/infiniband/hw/bnxt_re/ib_verbs.c @@ -173,8 +173,10 @@ int bnxt_re_query_device(struct ib_device *ibdev, ib_attr->max_pd = dev_attr->max_pd; ib_attr->max_qp_rd_atom = dev_attr->max_qp_rd_atom; ib_attr->max_qp_init_rd_atom = dev_attr->max_qp_init_rd_atom; - ib_attr->atomic_cap = IB_ATOMIC_HCA; - ib_attr->masked_atomic_cap = IB_ATOMIC_HCA; + if (dev_attr->is_atomic) { + ib_attr->atomic_cap = IB_ATOMIC_HCA; + ib_attr->masked_atomic_cap = IB_ATOMIC_HCA; + } ib_attr->max_ee_rd_atom = 0; ib_attr->max_res_rd_atom = 0; diff --git a/drivers/infiniband/hw/bnxt_re/qplib_sp.c b/drivers/infiniband/hw/bnxt_re/qplib_sp.c index 33c04a0..e277e54 100644 --- a/drivers/infiniband/hw/bnxt_re/qplib_sp.c +++ b/drivers/infiniband/hw/bnxt_re/qplib_sp.c @@ -51,6 +51,19 @@ const struct bnxt_qplib_gid bnxt_qplib_gid_zero = {{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }; /* Device */ + +static bool bnxt_qplib_is_atomic_cap(struct bnxt_qplib_rcfw *rcfw) +{ + int rc; + u16 pcie_ctl2; + + rc = pcie_capability_read_word(rcfw->pdev, PCI_EXP_DEVCTL2, + &pcie_ctl2); + if (rc) + return false; + return !!(pcie_ctl2 & PCI_EXP_DEVCTL2_ATOMIC_REQ); +} + int bnxt_qplib_get_dev_attr(struct bnxt_qplib_rcfw *rcfw, struct bnxt_qplib_dev_attr *attr) { @@ -131,6 +144,7 @@ int bnxt_qplib_get_dev_attr(struct bnxt_qplib_rcfw *rcfw, attr->tqm_alloc_reqs[i * 4 + 3] = *(++tqm_alloc); } + attr->is_atomic = bnxt_qplib_is_atomic_cap(rcfw); bail: bnxt_qplib_rcfw_free_sbuf(rcfw, sbuf); return rc; diff --git a/drivers/infiniband/hw/bnxt_re/qplib_sp.h b/drivers/infiniband/hw/bnxt_re/qplib_sp.h index e3a3ed9..1132258 100644 --- a/drivers/infiniband/hw/bnxt_re/qplib_sp.h +++ b/drivers/infiniband/hw/bnxt_re/qplib_sp.h @@ -42,6 +42,8 @@ #define BNXT_QPLIB_RESERVED_QP_WRS 128 +#define PCI_EXP_DEVCTL2_ATOMIC_REQ 0x0040 + struct bnxt_qplib_dev_attr { char fw_ver[32]; u16 max_sgid; @@ -70,6 +72,7 @@ struct bnxt_qplib_dev_attr { u32 max_inline_data; u32 l2_db_size; u8 tqm_alloc_reqs[MAX_TQM_ALLOC_REQ]; + bool is_atomic; }; struct bnxt_qplib_pd {