Message ID | 1526477470-10080-5-git-send-email-yishaih@mellanox.com (mailing list archive) |
---|---|
State | Not Applicable |
Delegated to: | Leon Romanovsky |
Headers | show |
On Wed, May 16, 2018 at 04:31:10PM +0300, Yishai Hadas wrote: > From: Ariel Levkovich <lariel@mellanox.com> > > This patch exposes the mlx5 device's capability to offload MPLS based > tunnel protocols via DV API. > The possible protocols are: > - Control word + MPLS over GRE. > - Control word + MPLS over UDP. > > Signed-off-by: Ariel Levkovich <lariel@mellanox.com> > Signed-off-by: Yishai Hadas <yishaih@mellanox.com> > providers/mlx5/mlx5dv.h | 8 +++++--- > 1 file changed, 5 insertions(+), 3 deletions(-) > > diff --git a/providers/mlx5/mlx5dv.h b/providers/mlx5/mlx5dv.h > index 2c31988..41493a6 100644 > +++ b/providers/mlx5/mlx5dv.h > @@ -92,9 +92,11 @@ struct mlx5dv_striding_rq_caps { > }; > > enum mlx5dv_tunnel_offloads { > - MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_VXLAN = 1 << 0, > - MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GRE = 1 << 1, > - MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GENEVE = 1 << 2, > + MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_VXLAN = 1 << 0, > + MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GRE = 1 << 1, > + MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GENEVE = 1 << 2, > + MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_GRE = 1 << 3, > + MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_UDP = 1 << 4, > }; Bleck, I dislike this mindless whitespace change and this is part of why I so dislike the 'column' alignment so much code is fond of... Jason -- To unsubscribe from this list: send the line "unsubscribe linux-rdma" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
On Wed, 2018-05-16 at 12:14 -0600, Jason Gunthorpe wrote: > On Wed, May 16, 2018 at 04:31:10PM +0300, Yishai Hadas wrote: > > From: Ariel Levkovich <lariel@mellanox.com> > > > > This patch exposes the mlx5 device's capability to offload MPLS based > > tunnel protocols via DV API. > > The possible protocols are: > > - Control word + MPLS over GRE. > > - Control word + MPLS over UDP. > > > > Signed-off-by: Ariel Levkovich <lariel@mellanox.com> > > Signed-off-by: Yishai Hadas <yishaih@mellanox.com> > > providers/mlx5/mlx5dv.h | 8 +++++--- > > 1 file changed, 5 insertions(+), 3 deletions(-) > > > > diff --git a/providers/mlx5/mlx5dv.h b/providers/mlx5/mlx5dv.h > > index 2c31988..41493a6 100644 > > +++ b/providers/mlx5/mlx5dv.h > > @@ -92,9 +92,11 @@ struct mlx5dv_striding_rq_caps { > > }; > > > > enum mlx5dv_tunnel_offloads { > > - MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_VXLAN = 1 << 0, > > - MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GRE = 1 << 1, > > - MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GENEVE = 1 << 2, > > + MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_VXLAN = 1 << 0, > > + MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GRE = 1 << 1, > > + MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GENEVE = 1 << 2, > > + MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_GRE = 1 << 3, > > + MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_UDP = 1 << 4, > > }; > > Bleck, I dislike this mindless whitespace change and this is part of > why I so dislike the 'column' alignment so much code is fond of... So, this whitespace churn makes patches harder to read, but I would argue the columnization makes the code itself easier to read. So I can see both sides of it.
On Wed, May 16, 2018 at 04:12:15PM -0400, Doug Ledford wrote: > On Wed, 2018-05-16 at 12:14 -0600, Jason Gunthorpe wrote: > > On Wed, May 16, 2018 at 04:31:10PM +0300, Yishai Hadas wrote: > > > From: Ariel Levkovich <lariel@mellanox.com> > > > > > > This patch exposes the mlx5 device's capability to offload MPLS based > > > tunnel protocols via DV API. > > > The possible protocols are: > > > - Control word + MPLS over GRE. > > > - Control word + MPLS over UDP. > > > > > > Signed-off-by: Ariel Levkovich <lariel@mellanox.com> > > > Signed-off-by: Yishai Hadas <yishaih@mellanox.com> > > > providers/mlx5/mlx5dv.h | 8 +++++--- > > > 1 file changed, 5 insertions(+), 3 deletions(-) > > > > > > diff --git a/providers/mlx5/mlx5dv.h b/providers/mlx5/mlx5dv.h > > > index 2c31988..41493a6 100644 > > > +++ b/providers/mlx5/mlx5dv.h > > > @@ -92,9 +92,11 @@ struct mlx5dv_striding_rq_caps { > > > }; > > > > > > enum mlx5dv_tunnel_offloads { > > > - MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_VXLAN = 1 << 0, > > > - MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GRE = 1 << 1, > > > - MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GENEVE = 1 << 2, > > > + MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_VXLAN = 1 << 0, > > > + MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GRE = 1 << 1, > > > + MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GENEVE = 1 << 2, > > > + MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_GRE = 1 << 3, > > > + MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_UDP = 1 << 4, > > > }; > > > > Bleck, I dislike this mindless whitespace change and this is part of > > why I so dislike the 'column' alignment so much code is fond of... > > So, this whitespace churn makes patches harder to read, but I would > argue the columnization makes the code itself easier to read. So I can > see both sides of it. You would not belive how much time I've spend delicately adjusting columnar alignment after search/replace or otherwise. Add in the churn like above that harms backporting, and I just think it is not worth any readability some people find. We also have some pretty egregious examples that are not even readable... The ipsec patches had a few cases like that. Aligning for structs seems somewhat common in the kernel. Also with enums and defines like above. However columm aligning for variables at the top of the function, blocks of assignments and other random places seems to be uniquely part of our subsystem. :( Jason -- To unsubscribe from this list: send the line "unsubscribe linux-rdma" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
diff --git a/providers/mlx5/mlx5dv.h b/providers/mlx5/mlx5dv.h index 2c31988..41493a6 100644 --- a/providers/mlx5/mlx5dv.h +++ b/providers/mlx5/mlx5dv.h @@ -92,9 +92,11 @@ struct mlx5dv_striding_rq_caps { }; enum mlx5dv_tunnel_offloads { - MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_VXLAN = 1 << 0, - MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GRE = 1 << 1, - MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GENEVE = 1 << 2, + MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_VXLAN = 1 << 0, + MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GRE = 1 << 1, + MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GENEVE = 1 << 2, + MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_GRE = 1 << 3, + MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_UDP = 1 << 4, }; enum mlx5dv_flow_action_cap_flags {