@@ -761,6 +761,14 @@ static int mlx5dv_get_qp(struct ibv_qp *qp_in,
mask_out |= MLX5DV_QP_MASK_UAR_MMAP_OFFSET;
}
+ if (qp_out->comp_mask & MLX5DV_QP_MASK_RAW_QP_HANDLES) {
+ qp_out->tirn = mqp->tirn;
+ qp_out->tisn = mqp->tisn;
+ qp_out->rqn = mqp->rqn;
+ qp_out->sqn = mqp->sqn;
+ mask_out |= MLX5DV_QP_MASK_RAW_QP_HANDLES;
+ }
+
if (mqp->bf->uuarn > 0)
qp_out->bf.size = mqp->bf->buf_size;
else
@@ -518,6 +518,10 @@ struct mlx5_qp {
int rss_qp;
uint32_t flags; /* Use enum mlx5_qp_flags */
enum mlx5dv_dc_type dc_type;
+ uint32_t tirn;
+ uint32_t tisn;
+ uint32_t rqn;
+ uint32_t sqn;
};
struct mlx5_ah {
@@ -288,6 +288,7 @@ int mlx5dv_query_device(struct ibv_context *ctx_in,
enum mlx5dv_qp_comp_mask {
MLX5DV_QP_MASK_UAR_MMAP_OFFSET = 1 << 0,
+ MLX5DV_QP_MASK_RAW_QP_HANDLES = 1 << 1,
};
struct mlx5dv_qp {
@@ -308,6 +309,10 @@ struct mlx5dv_qp {
} bf;
uint64_t comp_mask;
off_t uar_mmap_offset;
+ uint32_t tirn;
+ uint32_t tisn;
+ uint32_t rqn;
+ uint32_t sqn;
};
struct mlx5dv_cq {
@@ -1673,11 +1673,11 @@ static struct ibv_qp *create_qp(struct ibv_context *context,
struct mlx5_context *ctx = to_mctx(context);
struct ibv_qp *ibqp;
int32_t usr_idx = 0;
- uint32_t uuar_index;
uint32_t mlx5_create_flags = 0;
struct mlx5_bf *bf = NULL;
FILE *fp = ctx->dbg_fp;
struct mlx5_parent_domain *mparent_domain;
+ struct mlx5_ib_create_qp_resp *resp_drv;
if (attr->comp_mask & ~MLX5_CREATE_QP_SUP_COMP_MASK)
return NULL;
@@ -1884,8 +1884,8 @@ static struct ibv_qp *create_qp(struct ibv_context *context,
goto err_free_uidx;
}
- uuar_index = (attr->comp_mask & MLX5_CREATE_QP_EX2_COMP_MASK) ?
- resp_ex.bfreg_index : resp.bfreg_index;
+ resp_drv = attr->comp_mask & MLX5_CREATE_QP_EX2_COMP_MASK ?
+ &resp_ex.drv_payload : &resp.drv_payload;
if (!ctx->cqe_version) {
if (qp->sq.wqe_cnt || qp->rq.wqe_cnt) {
ret = mlx5_store_qp(ctx, ibqp->qp_num, qp);
@@ -1898,7 +1898,7 @@ static struct ibv_qp *create_qp(struct ibv_context *context,
pthread_mutex_unlock(&ctx->qp_table_mutex);
}
- map_uuar(context, qp, uuar_index, bf);
+ map_uuar(context, qp, resp_drv->bfreg_index, bf);
qp->rq.max_post = qp->rq.wqe_cnt;
if (attr->sq_sig_all)
@@ -1916,6 +1916,19 @@ static struct ibv_qp *create_qp(struct ibv_context *context,
if (mparent_domain)
atomic_fetch_add(&mparent_domain->mpd.refcount, 1);
+
+ if (resp_drv->comp_mask & MLX5_IB_CREATE_QP_RESP_MASK_TIRN)
+ qp->tirn = resp_drv->tirn;
+
+ if (resp_drv->comp_mask & MLX5_IB_CREATE_QP_RESP_MASK_TISN)
+ qp->tisn = resp_drv->tisn;
+
+ if (resp_drv->comp_mask & MLX5_IB_CREATE_QP_RESP_MASK_RQN)
+ qp->rqn = resp_drv->rqn;
+
+ if (resp_drv->comp_mask & MLX5_IB_CREATE_QP_RESP_MASK_SQN)
+ qp->sqn = resp_drv->sqn;
+
return ibqp;
err_destroy:
Expose device handles for RAW QP via the DV API, this includes, tirn, tisn, rqn, sqn. This enables using the DEVX interface with the above device handles. Signed-off-by: Yishai Hadas <yishaih@mellanox.com> --- providers/mlx5/mlx5.c | 8 ++++++++ providers/mlx5/mlx5.h | 4 ++++ providers/mlx5/mlx5dv.h | 5 +++++ providers/mlx5/verbs.c | 21 +++++++++++++++++---- 4 files changed, 34 insertions(+), 4 deletions(-)