From patchwork Sun Jan 27 12:01:32 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yishai Hadas X-Patchwork-Id: 10782869 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 83FCD1515 for ; Sun, 27 Jan 2019 12:40:22 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 66D312B296 for ; Sun, 27 Jan 2019 12:40:22 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 5AE1B2B2B0; Sun, 27 Jan 2019 12:40:22 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.9 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI,UNPARSEABLE_RELAY autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id E6D262B296 for ; Sun, 27 Jan 2019 12:40:21 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726516AbfA0MkV (ORCPT ); Sun, 27 Jan 2019 07:40:21 -0500 Received: from mail-il-dmz.mellanox.com ([193.47.165.129]:54137 "EHLO mellanox.co.il" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1726505AbfA0MkV (ORCPT ); Sun, 27 Jan 2019 07:40:21 -0500 Received: from Internal Mail-Server by MTLPINE1 (envelope-from yishaih@mellanox.com) with ESMTPS (AES256-SHA encrypted); 27 Jan 2019 14:40:13 +0200 Received: from vnc17.mtl.labs.mlnx (vnc17.mtl.labs.mlnx [10.7.2.17]) by labmailer.mlnx (8.13.8/8.13.8) with ESMTP id x0RCeDxi017527; Sun, 27 Jan 2019 14:40:13 +0200 Received: from vnc17.mtl.labs.mlnx (vnc17.mtl.labs.mlnx [127.0.0.1]) by vnc17.mtl.labs.mlnx (8.13.8/8.13.8) with ESMTP id x0RC1khM016756; Sun, 27 Jan 2019 14:01:46 +0200 Received: (from yishaih@localhost) by vnc17.mtl.labs.mlnx (8.13.8/8.13.8/Submit) id x0RC1kIh016755; Sun, 27 Jan 2019 14:01:46 +0200 From: Yishai Hadas To: linux-rdma@vger.kernel.org Cc: yishaih@mellanox.com, michaelgur@mellanox.com, jgg@mellanox.com, majd@mellanox.com Subject: [PATCH rdma-core 1/3] mlx5: Infrastructure for building mailbox for devx Date: Sun, 27 Jan 2019 14:01:32 +0200 Message-Id: <1548590494-16684-2-git-send-email-yishaih@mellanox.com> X-Mailer: git-send-email 1.8.2.3 In-Reply-To: <1548590494-16684-1-git-send-email-yishaih@mellanox.com> References: <1548590494-16684-1-git-send-email-yishaih@mellanox.com> Sender: linux-rdma-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-rdma@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Michael Guralnik When using the devx interface a user needs to build and parse mailboxes to and from firmware based on predefined structures. In the kernel this is done using a set of getters and setters. This commit introduces this infrastructure to the user-space. Signed-off-by: Michael Guralnik Signed-off-by: Yishai Hadas --- providers/mlx5/mlx5dv.h | 59 +++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 59 insertions(+) diff --git a/providers/mlx5/mlx5dv.h b/providers/mlx5/mlx5dv.h index 416cf92..8c76713 100644 --- a/providers/mlx5/mlx5dv.h +++ b/providers/mlx5/mlx5dv.h @@ -1169,6 +1169,65 @@ int mlx5dv_devx_ind_tbl_modify(struct ibv_rwq_ind_table *ind_tbl, const void *in, size_t inlen, void *out, size_t outlen); +#define __devx_nullp(typ) ((struct mlx5_ifc_##typ##_bits *)NULL) +#define __devx_st_sz_bits(typ) sizeof(struct mlx5_ifc_##typ##_bits) +#define __devx_bit_sz(typ, fld) sizeof(__devx_nullp(typ)->fld) +#define __devx_bit_off(typ, fld) offsetof(struct mlx5_ifc_##typ##_bits, fld) +#define __devx_dw_off(bit_off) ((bit_off) / 32) +#define __devx_64_off(bit_off) ((bit_off) / 64) +#define __devx_dw_bit_off(bit_sz, bit_off) (32 - (bit_sz) - ((bit_off) & 0x1f)) +#define __devx_mask(bit_sz) ((uint32_t)((1ull << (bit_sz)) - 1)) +#define __devx_dw_mask(bit_sz, bit_off) \ + (__devx_mask(bit_sz) << __devx_dw_bit_off(bit_sz, bit_off)) + +#define DEVX_FLD_SZ_BYTES(typ, fld) (__devx_bit_sz(typ, fld) / 8) +#define DEVX_ST_SZ_BYTES(typ) (sizeof(struct mlx5_ifc_##typ##_bits) / 8) +#define DEVX_ST_SZ_DW(typ) (sizeof(struct mlx5_ifc_##typ##_bits) / 32) +#define DEVX_ST_SZ_QW(typ) (sizeof(struct mlx5_ifc_##typ##_bits) / 64) +#define DEVX_UN_SZ_BYTES(typ) (sizeof(union mlx5_ifc_##typ##_bits) / 8) +#define DEVX_UN_SZ_DW(typ) (sizeof(union mlx5_ifc_##typ##_bits) / 32) +#define DEVX_BYTE_OFF(typ, fld) (__devx_bit_off(typ, fld) / 8) +#define DEVX_ADDR_OF(typ, p, fld) \ + ((unsigned char *)(p) + DEVX_BYTE_OFF(typ, fld)) + +static inline void _devx_set(void *p, uint32_t value, size_t bit_off, + size_t bit_sz) +{ + __be32 *fld = (__be32 *)(p) + __devx_dw_off(bit_off); + uint32_t dw_mask = __devx_dw_mask(bit_sz, bit_off); + uint32_t mask = __devx_mask(bit_sz); + + *fld = htobe32((be32toh(*fld) & (~dw_mask)) | + ((value & mask) << __devx_dw_bit_off(bit_sz, bit_off))); +} + +#define DEVX_SET(typ, p, fld, v) \ + _devx_set(p, v, __devx_bit_off(typ, fld), __devx_bit_sz(typ, fld)) + +static inline uint32_t _devx_get(const void *p, size_t bit_off, size_t bit_sz) +{ + return ((be32toh(*((__be32 *)(p) + __devx_dw_off(bit_off))) >> + __devx_dw_bit_off(bit_sz, bit_off)) & + __devx_mask(bit_sz)); +} + +#define DEVX_GET(typ, p, fld) \ + _devx_get(p, __devx_bit_off(typ, fld), __devx_bit_sz(typ, fld)) + +static inline void _devx_set64(void *p, uint64_t v, size_t bit_off) +{ + *((__be64 *)(p) + __devx_64_off(bit_off)) = htobe64(v); +} + +#define DEVX_SET64(typ, p, fld, v) _devx_set64(p, v, __devx_bit_off(typ, fld)) + +static inline uint64_t _devx_get64(void *p, size_t bit_off) +{ + return be64toh(*((__be64 *)(p) + __devx_64_off(bit_off))); +} + +#define DEVX_GET64(typ, p, fld) _devx_get64(p, __devx_bit_off(typ, fld)) + #ifdef __cplusplus } #endif