From patchwork Thu Jun 27 02:41:05 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Selvin Xavier X-Patchwork-Id: 13713768 Received: from mail-pf1-f171.google.com (mail-pf1-f171.google.com [209.85.210.171]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 91D35F9E4 for ; Thu, 27 Jun 2024 03:02:05 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.210.171 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1719457327; cv=none; b=fau+EVQaUyqKXKsC9sq+meQe9ohpQO0vbasNnIbR9HJgYl1BDGYTppgtX6YmQbLOKyPOS8VsHny92O2ztUvQs4HjtwumKLJpGqMt8jkBH5JajQnY/zeEh87/ZbfmTHMuI5j1qYbiaBWwzDPZR0XnLlbwVowfM2tWwfIll+t7Hdg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1719457327; c=relaxed/simple; bh=HKjXnfLm2m4bFdvLBpF3QCDc1g3UNbWlBNNtpbsQFSM=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: Content-Type; b=cn2BGFfuKIvQMd/J71wkoAGzEqhE0sLUxP55WVMsq/x9GrXFtZqII4gzLTWanKt0nlJQm51Ire+0IIXm3iQN5ULrRO2TzlZEYxjbZpCfU1H+RwHx9gYOL2s9GFzpLr215Ah0Rs1kF0+uyVdGSKGBzwW8oz95Bt2nSxfnLSpZWVw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=broadcom.com; spf=fail smtp.mailfrom=broadcom.com; dkim=pass (1024-bit key) header.d=broadcom.com header.i=@broadcom.com header.b=Pf6z3DZb; arc=none smtp.client-ip=209.85.210.171 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=broadcom.com Authentication-Results: smtp.subspace.kernel.org; spf=fail smtp.mailfrom=broadcom.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=broadcom.com header.i=@broadcom.com header.b="Pf6z3DZb" Received: by mail-pf1-f171.google.com with SMTP id d2e1a72fcca58-7065e2fe7d9so4200149b3a.3 for ; Wed, 26 Jun 2024 20:02:05 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=broadcom.com; s=google; t=1719457325; x=1720062125; darn=vger.kernel.org; h=references:in-reply-to:message-id:date:subject:cc:to:from:from:to :cc:subject:date:message-id:reply-to; bh=BxR07j9lWmVKzHRqDbkJYOyqaI1iQZ6WqhMvpuLEi98=; b=Pf6z3DZbot/q3xNLy7CiwywxsDZptHq2r+I9AgOtAtx5jP9LFW80h/Fw4iTyHfP+qL FhvKSk7ER6Jg6XJfHbKRNuIKv06dKLxehYs6+HZUCBpXvbdkdw05Tl8WIFYa7ay+vttL DQueFNxsU3WAehYDmnJuRVfA/NxfyVYwmphYk= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1719457325; x=1720062125; h=references:in-reply-to:message-id:date:subject:cc:to:from :x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=BxR07j9lWmVKzHRqDbkJYOyqaI1iQZ6WqhMvpuLEi98=; b=Nhb+4kDjeseB3kCEr91r5kz/tNU/rgR3jWl/FuQ+hR15pbikP77Unzx6Nt9hKR9OON LEu83/+sUcLbJYx+5pwvcUVLK24vt6qsZjV/2ENWSnKlPF9Gyx/H1Ub0w22GF5kMDfuh EqG6M3MHQ11OdIiDU5UPOgdNsAxqXsqyUOAXlv+VhweHf1DkdASF9XiCNeWWtYGfb0g+ yg/Tg4l6fjHep6KaJ9o7vNP/LhCZJ13KOim5N33QCnImbQNQDIIVl39J3xI8YSTK1daW vwmEhMCON4hyqfyhfhFdO0C3y4AKDuyAg2lqe6CVhD/eNT5KTQMZoh5GTyAS/Fla/kHH 2MKA== X-Gm-Message-State: AOJu0Yxdmsylvw6GMvAPE4MBLvJQ19nOyTTILL7N7RSgy3oWKDeaw9ml tTLUImJun6TbkF9LMOogpxpqZyZ8U/YXOmNN7KykFr11kIYHHjoZXplKYXoTOA== X-Google-Smtp-Source: AGHT+IGlDtCJ+D1onvo8x8HSvajywOz1qx3QqKg4H1CNQ/xF+fd79si4IBDrjJA/aGg7IQMO5Kw6+A== X-Received: by 2002:a05:6a20:3b05:b0:1bd:27fd:ff56 with SMTP id adf61e73a8af0-1bd27fe00a6mr5601925637.58.1719457324887; Wed, 26 Jun 2024 20:02:04 -0700 (PDT) Received: from sxavier-dev.dhcp.broadcom.net ([192.19.234.250]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-1faac997da7sm2103285ad.216.2024.06.26.20.02.02 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Wed, 26 Jun 2024 20:02:04 -0700 (PDT) From: Selvin Xavier To: leon@kernel.org, jgg@ziepe.ca Cc: linux-rdma@vger.kernel.org, andrew.gospodarek@broadcom.com, Selvin Xavier Subject: [PATCH for-next 3/3] RDMA/bnxt_re: Disable doorbell moderation if hardware register read fails Date: Wed, 26 Jun 2024 19:41:05 -0700 Message-Id: <1719456065-27394-4-git-send-email-selvin.xavier@broadcom.com> X-Mailer: git-send-email 2.5.5 In-Reply-To: <1719456065-27394-1-git-send-email-selvin.xavier@broadcom.com> References: <1719456065-27394-1-git-send-email-selvin.xavier@broadcom.com> Precedence: bulk X-Mailing-List: linux-rdma@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: If the HW register read fails, the FIFO will be always shown as full. DB moderation doesn't work in that case and the traffic fails. So disable this feature and log a message. Signed-off-by: Selvin Xavier --- drivers/infiniband/hw/bnxt_re/main.c | 45 +++++++++++++++++++++++++++--------- 1 file changed, 34 insertions(+), 11 deletions(-) diff --git a/drivers/infiniband/hw/bnxt_re/main.c b/drivers/infiniband/hw/bnxt_re/main.c index 2c5282f..9714b9a 100644 --- a/drivers/infiniband/hw/bnxt_re/main.c +++ b/drivers/infiniband/hw/bnxt_re/main.c @@ -488,19 +488,40 @@ static void bnxt_re_set_default_pacing_data(struct bnxt_re_dev *rdev) pacing_data->pacing_th * BNXT_RE_PACING_ALARM_TH_MULTIPLE; } -static void __wait_for_fifo_occupancy_below_th(struct bnxt_re_dev *rdev) +static u32 __get_fifo_occupancy(struct bnxt_re_dev *rdev) { struct bnxt_qplib_db_pacing_data *pacing_data = rdev->qplib_res.pacing_data; u32 read_val, fifo_occup; + read_val = readl(rdev->en_dev->bar0 + rdev->pacing.dbr_db_fifo_reg_off); + fifo_occup = pacing_data->fifo_max_depth - + ((read_val & pacing_data->fifo_room_mask) >> + pacing_data->fifo_room_shift); + return fifo_occup; +} + +static bool is_dbr_fifo_full(struct bnxt_re_dev *rdev) +{ + u32 max_occup, fifo_occup; + + fifo_occup = __get_fifo_occupancy(rdev); + max_occup = BNXT_RE_MAX_FIFO_DEPTH(rdev->chip_ctx) - 1; + if (fifo_occup == max_occup) + return true; + + return false; +} + +static void __wait_for_fifo_occupancy_below_th(struct bnxt_re_dev *rdev) +{ + struct bnxt_qplib_db_pacing_data *pacing_data = rdev->qplib_res.pacing_data; + u32 fifo_occup; + /* loop shouldn't run infintely as the occupancy usually goes * below pacing algo threshold as soon as pacing kicks in. */ while (1) { - read_val = readl(rdev->en_dev->bar0 + rdev->pacing.dbr_db_fifo_reg_off); - fifo_occup = pacing_data->fifo_max_depth - - ((read_val & pacing_data->fifo_room_mask) >> - pacing_data->fifo_room_shift); + fifo_occup = __get_fifo_occupancy(rdev); /* Fifo occupancy cannot be greater the MAX FIFO depth */ if (fifo_occup > pacing_data->fifo_max_depth) break; @@ -556,16 +577,13 @@ static void bnxt_re_pacing_timer_exp(struct work_struct *work) struct bnxt_re_dev *rdev = container_of(work, struct bnxt_re_dev, dbq_pacing_work.work); struct bnxt_qplib_db_pacing_data *pacing_data; - u32 read_val, fifo_occup; + u32 fifo_occup; if (!mutex_trylock(&rdev->pacing.dbq_lock)) return; pacing_data = rdev->qplib_res.pacing_data; - read_val = readl(rdev->en_dev->bar0 + rdev->pacing.dbr_db_fifo_reg_off); - fifo_occup = pacing_data->fifo_max_depth - - ((read_val & pacing_data->fifo_room_mask) >> - pacing_data->fifo_room_shift); + fifo_occup = __get_fifo_occupancy(rdev); if (fifo_occup > pacing_data->pacing_th) goto restart_timer; @@ -613,7 +631,6 @@ void bnxt_re_pacing_alert(struct bnxt_re_dev *rdev) static int bnxt_re_initialize_dbr_pacing(struct bnxt_re_dev *rdev) { - /* Allocate a page for app use */ rdev->pacing.dbr_page = (void *)__get_free_page(GFP_KERNEL); if (!rdev->pacing.dbr_page) @@ -637,6 +654,12 @@ static int bnxt_re_initialize_dbr_pacing(struct bnxt_re_dev *rdev) rdev->pacing.dbr_bar_addr = pci_resource_start(rdev->qplib_res.pdev, 0) + rdev->pacing.dbr_db_fifo_reg_off; + if (is_dbr_fifo_full(rdev)) { + free_page((u64)rdev->pacing.dbr_page); + rdev->pacing.dbr_page = NULL; + return -EIO; + } + rdev->pacing.pacing_algo_th = BNXT_RE_PACING_ALGO_THRESHOLD; rdev->pacing.dbq_pacing_time = BNXT_RE_DBR_PACING_TIME; rdev->pacing.dbr_def_do_pacing = BNXT_RE_DBR_DO_PACING_NO_CONGESTION;