From patchwork Tue Sep 24 20:39:10 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bjorn Helgaas X-Patchwork-Id: 2935671 Return-Path: X-Original-To: patchwork-linux-rdma@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id A4385BFF05 for ; Tue, 24 Sep 2013 20:39:21 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id CD82E2042C for ; Tue, 24 Sep 2013 20:39:20 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 0E42D20206 for ; Tue, 24 Sep 2013 20:39:18 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754400Ab3IXUjQ (ORCPT ); Tue, 24 Sep 2013 16:39:16 -0400 Received: from mail-yh0-f54.google.com ([209.85.213.54]:37187 "EHLO mail-yh0-f54.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753865Ab3IXUjO (ORCPT ); Tue, 24 Sep 2013 16:39:14 -0400 Received: by mail-yh0-f54.google.com with SMTP id z20so2225530yhz.41 for ; Tue, 24 Sep 2013 13:39:14 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=date:from:to:cc:subject:message-id:references:mime-version :content-type:content-disposition:in-reply-to:user-agent; bh=5Pz+rqdD6fPrVpV0LeMeHNBzjKu4PvrraaYJpxOjPxM=; b=kKxoSEBV8ZRF4mAkqFjWyo3laOvs6iChZmtl1R/LFfoX7qV73SwnRdvFfc5cKYgucK 1DN8m+VpFQ79mZFs4MwLsSZm1HZ2KvRD56ENxWNMHvnZeXtVyB+xjPNz6QR2BZrMjEww sWf87QVNwXWUJgSb5gx4f5GVw8U6p2AfOC8F1qHYLmONesgu49OlyNKxsE3uNJU/97eG B+PqdkQ6MKSDXaQADnRiC1Be3Cg1BBdXyB6iHalZ7cXoQT/y0i0Fuq1pBHy5ASr2Oumh OxrhAlQTfeHJhyGlsCWpa9w0QaZtlIZIqynQN8J70HKDGEEisiHvZTf+tmnY0x0wJX+f RlwQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-type:content-disposition:in-reply-to :user-agent; bh=5Pz+rqdD6fPrVpV0LeMeHNBzjKu4PvrraaYJpxOjPxM=; b=SyYQQvcp+4Ybmb+erFaIyfSQoGKes+gr9QIEynaAWYFcwskueup3IEXNyS/ofLgRb1 VR9Jy1M3a+h4+aLNIPShKZkawg8CkM/VxcQhMO1Mb8gRW36J+Q/WlAPGeN4Y3vKJ2bEb 3+ntOYGi5EvB9vwbQqThpSByYr37dYdMAFR+me9KYfnoN6LdI3XuRl585/7PZ7te4gsB mYsbOSWw1mjiE6bdKDRbMA/rzCiemh3w6Grf4CGYi+pZzxeYAYqumg2Rz3h9qKbiDb8R S1KpECWfCbBGtWfJyiqLqkL/xRh+glcL8TB5Zif5ACMSLz8/qQq59sRbGbDz/xsf7PbY JjEQ== X-Gm-Message-State: ALoCoQl4M1x5Ki4IQDRldspborVV5M1CqSHpg05r+StupYvAM8vgcj5zB5ZDax6KF3pD5DAZrdlU8mL1KmOyNbhzOX5nNy6p9S4jLEA4NYw+cs21w7s1v5Fe5pmXUNvitSPRtUWqwAMvEMfImNkzMAxEdN+rOZWm8UTVZNYdeNYMN9PGCS7dcnko2tsW7c/z4By+f3u0sncNwWql0dXMyb6LZNyYsWqgpg== X-Received: by 10.236.141.12 with SMTP id f12mr2717718yhj.34.1380055154301; Tue, 24 Sep 2013 13:39:14 -0700 (PDT) Received: from google.com ([172.16.50.208]) by mx.google.com with ESMTPSA id y46sm14562174yhy.18.1969.12.31.16.00.00 (version=TLSv1.2 cipher=RC4-SHA bits=128/128); Tue, 24 Sep 2013 13:39:13 -0700 (PDT) Date: Tue, 24 Sep 2013 14:39:10 -0600 From: Bjorn Helgaas To: Yijing Wang Cc: Chris Metcalf , Greg Kroah-Hartman , David Airlie , Mike Marciniszyn , Roland Dreier , Roland Dreier , linux-kernel@vger.kernel.org, Mark Einon , Sean Hefty , Hal Rosenstock , linux-rdma@vger.kernel.org, linux-pci@vger.kernel.org, Hanjun Guo Subject: Re: [PATCH 4/6] IB/qib: Use pcie_set_mps() and pcie_get_mps() to simplify code Message-ID: <20130924203910.GB9302@google.com> References: <1378732388-4508-1-git-send-email-wangyijing@huawei.com> <1378732388-4508-5-git-send-email-wangyijing@huawei.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <1378732388-4508-5-git-send-email-wangyijing@huawei.com> User-Agent: Mutt/1.5.21 (2010-09-15) Sender: linux-rdma-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-rdma@vger.kernel.org X-Spam-Status: No, score=-5.7 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, KHOP_BIG_TO_CC, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, T_DKIM_INVALID, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP On Mon, Sep 09, 2013 at 09:13:06PM +0800, Yijing Wang wrote: > Refactor qib_tune_pcie_caps() function, use pcie_set_mps() > and pcie_get_mps() to simply code. Because pci core caches > the "PCI-E Max Payload Size Supported" in pci_dev->pcie_mpss, > so use that instead of pcie_capability_read_word(). Remove > the unused val2fld() and fld2val(). I propose the following patch on top of this one: IB/qib: Drop qib_tune_pcie_caps() and qib_tune_pcie_coalesce() return values From: Bjorn Helgaas The callers of qib_tune_pcie_caps() and qib_tune_pcie_coalesce() don't check the return values, so this patch drops the return values altogether. Signed-off-by: Bjorn Helgaas --- drivers/infiniband/hw/qib/qib_pcie.c | 28 ++++++++++++---------------- 1 file changed, 12 insertions(+), 16 deletions(-) -- To unsubscribe from this list: send the line "unsubscribe linux-rdma" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/drivers/infiniband/hw/qib/qib_pcie.c b/drivers/infiniband/hw/qib/qib_pcie.c index 24973c8..c8d9c4a 100644 --- a/drivers/infiniband/hw/qib/qib_pcie.c +++ b/drivers/infiniband/hw/qib/qib_pcie.c @@ -51,8 +51,8 @@ * file calls, even though this violates some * expectations of harmlessness. */ -static int qib_tune_pcie_caps(struct qib_devdata *); -static int qib_tune_pcie_coalesce(struct qib_devdata *); +static void qib_tune_pcie_caps(struct qib_devdata *); +static void qib_tune_pcie_coalesce(struct qib_devdata *); /* * Do all the common PCIe setup and initialization. @@ -487,7 +487,7 @@ MODULE_PARM_DESC(pcie_coalesce, "tune PCIe colescing on some Intel chipsets"); * of these chipsets, with some BIOS settings, and enabling it on those * systems may result in the system crashing, and/or data corruption. */ -static int qib_tune_pcie_coalesce(struct qib_devdata *dd) +static void qib_tune_pcie_coalesce(struct qib_devdata *dd) { int r; struct pci_dev *parent; @@ -495,18 +495,18 @@ static int qib_tune_pcie_coalesce(struct qib_devdata *dd) u32 mask, bits, val; if (!qib_pcie_coalesce) - return 0; + return; /* Find out supported and configured values for parent (root) */ parent = dd->pcidev->bus->self; if (parent->bus->parent) { qib_devinfo(dd->pcidev, "Parent not root\n"); - return 1; + return; } if (!pci_is_pcie(parent)) - return 1; + return; if (parent->vendor != 0x8086) - return 1; + return; /* * - bit 12: Max_rdcmp_Imt_EN: need to set to 1 @@ -539,13 +539,12 @@ static int qib_tune_pcie_coalesce(struct qib_devdata *dd) mask = (3U << 24) | (7U << 10); } else { /* not one of the chipsets that we know about */ - return 1; + return; } pci_read_config_dword(parent, 0x48, &val); val &= ~mask; val |= bits; r = pci_write_config_dword(parent, 0x48, val); - return 0; } /* @@ -556,9 +555,8 @@ static int qib_pcie_caps; module_param_named(pcie_caps, qib_pcie_caps, int, S_IRUGO); MODULE_PARM_DESC(pcie_caps, "Max PCIe tuning: Payload (0..3), ReadReq (4..7)"); -static int qib_tune_pcie_caps(struct qib_devdata *dd) +static void qib_tune_pcie_caps(struct qib_devdata *dd) { - int ret = 1; /* Assume the worst */ struct pci_dev *parent; u16 rc_mpss, rc_mps, ep_mpss, ep_mps; u16 rc_mrrs, ep_mrrs, max_mrrs; @@ -567,18 +565,18 @@ static int qib_tune_pcie_caps(struct qib_devdata *dd) parent = dd->pcidev->bus->self; if (!pci_is_root_bus(parent->bus)) { qib_devinfo(dd->pcidev, "Parent not root\n"); - goto bail; + return; } if (!pci_is_pcie(parent) || !pci_is_pcie(dd->pcidev)) - goto bail; + return; + rc_mpss = parent->pcie_mpss; rc_mps = ffs(pcie_get_mps(parent)) - 8; /* Find out supported and configured values for endpoint (us) */ ep_mpss = dd->pcidev->pcie_mpss; ep_mps = ffs(pcie_get_mps(dd->pcidev)) - 8; - ret = 0; /* Find max payload supported by root, endpoint */ if (rc_mpss > ep_mpss) rc_mpss = ep_mpss; @@ -618,8 +616,6 @@ static int qib_tune_pcie_caps(struct qib_devdata *dd) ep_mrrs = max_mrrs; pcie_set_readrq(dd->pcidev, ep_mrrs); } -bail: - return ret; } /* End of PCIe capability tuning */