@@ -273,12 +273,26 @@ cdef extern from 'infiniband/mlx5dv.h':
qp qp
srq srq
+ cdef struct mlx5_cqe64:
+ uint16_t wqe_id
+ uint32_t imm_inval_pkey
+ uint32_t byte_cnt
+ uint64_t timestamp
+ uint16_t wqe_counter
+ uint8_t signature
+ uint8_t op_own
+
void mlx5dv_set_ctrl_seg(mlx5_wqe_ctrl_seg *seg, uint16_t pi, uint8_t opcode,
uint8_t opmod, uint32_t qp_num, uint8_t fm_ce_se,
uint8_t ds, uint8_t signature, uint32_t imm)
void mlx5dv_set_data_seg(mlx5_wqe_data_seg *seg, uint32_t length,
uint32_t lkey, uintptr_t address)
+ uint8_t mlx5dv_get_cqe_owner(mlx5_cqe64 *cqe)
+ void mlx5dv_set_cqe_owner(mlx5_cqe64 *cqe, uint8_t val)
+ uint8_t mlx5dv_get_cqe_se(mlx5_cqe64 *cqe)
+ uint8_t mlx5dv_get_cqe_format(mlx5_cqe64 *cqe)
+ uint8_t mlx5dv_get_cqe_opcode(mlx5_cqe64 *cqe)
bool mlx5dv_is_supported(v.ibv_device *device)
v.ibv_context* mlx5dv_open_device(v.ibv_device *device,
mlx5dv_context_attr *attr)
@@ -83,3 +83,6 @@ cdef class Mlx5DevxObj(PyverbsCM):
cdef dv.mlx5dv_devx_obj *obj
cdef Context context
cdef object out_view
+
+cdef class Mlx5Cqe64(PyverbsObject):
+ cdef dv.mlx5_cqe64 *cqe
@@ -1507,3 +1507,74 @@ cdef class Mlx5UMEM(PyverbsCM):
def umem_addr(self):
if self.addr:
return <uintptr_t><void*>self.addr
+
+
+cdef class Mlx5Cqe64(PyverbsObject):
+ def __init__(self, addr):
+ self.cqe = <dv.mlx5_cqe64*><uintptr_t> addr
+
+ def dump(self):
+ dump_format = '{:08x} {:08x} {:08x} {:08x}\n'
+ str = ''
+ for i in range(0, 16, 4):
+ str += dump_format.format(be32toh((<uint32_t*>self.cqe)[i]),
+ be32toh((<uint32_t*>self.cqe)[i + 1]),
+ be32toh((<uint32_t*>self.cqe)[i + 2]),
+ be32toh((<uint32_t*>self.cqe)[i + 3]))
+ return str
+
+ def is_empty(self):
+ for i in range(16):
+ if be32toh((<uint32_t*>self.cqe)[i]) != 0:
+ return False
+ return True
+
+ @property
+ def owner(self):
+ return dv.mlx5dv_get_cqe_owner(self.cqe)
+ @owner.setter
+ def owner(self, val):
+ dv.mlx5dv_set_cqe_owner(self.cqe, <uint8_t> val)
+
+ @property
+ def se(self):
+ return dv.mlx5dv_get_cqe_se(self.cqe)
+
+ @property
+ def format(self):
+ return dv.mlx5dv_get_cqe_format(self.cqe)
+
+ @property
+ def opcode(self):
+ return dv.mlx5dv_get_cqe_opcode(self.cqe)
+
+ @property
+ def imm_inval_pkey(self):
+ return be32toh(self.cqe.imm_inval_pkey)
+
+ @property
+ def wqe_id(self):
+ return be16toh(self.cqe.wqe_id)
+
+ @property
+ def byte_cnt(self):
+ return be32toh(self.cqe.byte_cnt)
+
+ @property
+ def timestamp(self):
+ return be64toh(self.cqe.timestamp)
+
+ @property
+ def wqe_counter(self):
+ return be16toh(self.cqe.wqe_counter)
+
+ @property
+ def signature(self):
+ return self.cqe.signature
+
+ @property
+ def op_own(self):
+ return self.cqe.op_own
+
+ def __str__(self):
+ return (<dv.mlx5_cqe64>((<dv.mlx5_cqe64*>self.cqe)[0])).__str__()
@@ -193,6 +193,28 @@ cdef extern from 'infiniband/mlx5dv.h':
MLX5DV_OBJ_AH
MLX5DV_OBJ_PD
+ cpdef enum:
+ MLX5_RCV_DBR
+ MLX5_SND_DBR
+
+ cpdef enum:
+ MLX5_CQE_OWNER_MASK
+ MLX5_CQE_REQ
+ MLX5_CQE_RESP_WR_IMM
+ MLX5_CQE_RESP_SEND
+ MLX5_CQE_RESP_SEND_IMM
+ MLX5_CQE_RESP_SEND_INV
+ MLX5_CQE_RESIZE_CQ
+ MLX5_CQE_NO_PACKET
+ MLX5_CQE_SIG_ERR
+ MLX5_CQE_REQ_ERR
+ MLX5_CQE_RESP_ERR
+ MLX5_CQE_INVALID
+
+ cpdef enum:
+ MLX5_SEND_WQE_BB
+ MLX5_SEND_WQE_SHIFT
+
cpdef unsigned long long MLX5DV_RES_TYPE_QP
cpdef unsigned long long MLX5DV_RES_TYPE_RWQ
cpdef unsigned long long MLX5DV_RES_TYPE_DBR